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Wide frequency range delay locked loop

  • US 20040125905A1
  • Filed: 12/31/2002
  • Published: 07/01/2004
  • Est. Priority Date: 12/31/2002
  • Status: Active Grant
First Claim
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1. A delay locked loop comprising:

  • a digital delay circuit which enables delay elements to provide coarse phase adjustment in the delay locked loop; and

    an analog delay circuit which provides a fine phase adjustment in the delay locked loop while the digital delay circuit is held at a fixed delay.

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