Apparatus and methods for the inspection of objects

• US 20040126005A1
• Filed: 11/12/2003
• Published: 07/01/2004
• Est. Priority Date: 08/05/1999
• Status: Active Grant

• Current Assignee: Orbotech Limited (KLA Corporation)
• Original Assignee: Orbotech Limited (KLA Corporation)
• Inventors: Smilansky, Zeev, Klingbell, Eyal, Gilat-Bernshtein, Tally, Duvdevani, Sharon, Mayo, Meir, Rippa, Shmuel
• Granted Patent: US 7,181,059 B2
• Time in Patent Office: Days
• US Class Current: 382/149
• CPC Class Codes: G06F 18/40 Software arrangements specially adapted for pattern recognition, e.g. user interfaces or toolboxes therefor
• CPC Class Codes: G06T 2207/30141 Printed circuit board [PCB]
• CPC Class Codes: G06T 7/001 using an image reference approach
• CPC Class Codes: G06V 10/469 Contour-based spatial representations, e.g. vector-coding
• CPC Class Codes: G06V 10/752 Contour matching
• CPC Class Codes: G06V 10/94 Hardware or software architectures specially adapted for image or video understanding

Abstract

This invention discloses a system and method for inspecting objects, the method including creating a reference image for a representative object, the reference image comprising an at least partially vectorized first representation of boundaries within the image, acquiring an image of an object under inspection comprising a second representation of boundaries within the image, and comparing the second representation of boundaries to said at least partially vectorized first representation of boundaries, thereby to identify defects.

A method and system for image processing in a software environment, the method including providing to a software based image processor a combination of user defined regions and defect triggers received from a hardware processor, and inspecting each of the user defined regions and regions surrounding hardware defect triggers each with a dynamically chosen set of inspection algorithms is also disclosed.

Claims

1. A system for inspecting electrical circuits comprising:

a boundary identifier operative to generate a representation of boundaries of elements in an image of an electrical circuit which is under inspection; and

a defect identifier operative to receive said representation of boundaries of elements and to analyze at least some locations of at least some boundaries in said representation of boundaries of elements to identify defects in said electrical circuit.

2. A system according to claim 1, and wherein said boundary identifier is operative in hardware.

3. A system according to claim 1, and wherein said defect identifier is operative in software.

4. A system according to claim 2, and wherein said defect identifier is operative in software.

5. A system according to claim 1, and wherein said defect identifier is operative to compare an actual location of at least one boundary from among said boundaries in said image under inspection, to a location of a corresponding boundary in at least one reference image.

6. A system according to claim 1, wherein said boundaries comprise contours.

7. A system according to claim 1, and wherein said system further includes a putative defect detector operative to identify at least some putative defects.

8. A system according to claim 7, and wherein said defect identifier is operative to analyze, from among said at least some boundaries, those boundaries that are associated with said putative defects.

9. A system according to claim 1, and wherein said system farther includes a region of interest identifier operative to identify a portion of said image of an electrical circuit as being a region of interest.

10. A system according to claim 9, and wherein said defect identifier is operative to analyze, from among at least some boundaries, only those boundaries that are in said region of interest.

11. A system according to claim 8, and wherein said system further includes a region of interest identifier operative to identify a portion of said image of an electrical circuit as being a region of interest, and said defect identifier is operative to analyze at least one characteristic of said at least some boundaries that are in said region of interest.

19. A system according to claim 1, wherein a threshold vicinity is defined around at least one boundary in said at least one reference image and wherein said defect identifier is operative to determine whether a corresponding boundary in the image under inspection falls within the threshold vicinity and, if not, to declare a putative defect associated with said boundary.

20. A system according to claim 19, wherein said threshold vicinity comprises an envelope around the at least one boundary in the at least one reference image.

12. A method for inspecting electrical circuits comprising:

generating a representation of boundaries of elements in an image of an electrical circuit; and

analyzing at least one of said boundaries in said representation of boundaries of elements to identify defects in said electrical circuit.

13. A method according to claim 12, and wherein said generating is performed in hardware.

14. A method according to claim 12, and wherein said analyzing is performed in software.

15. A method according to claim 13, and wherein said analyzing is performed in software.

16. A method according to claim 12, and wherein said analyzing comprises analyzing at least one characteristic of a location of at least some of said boundaries.

17. A method according to claim 16, and wherein said analyzing a location of at least some of said boundaries comprises comparing at least one characteristic of a location of a selected boundary to at least one characteristic of a location of a corresponding boundary in a reference.

18. A method according to claim 12, and further including identifying a portion of said image of an electrical circuit as being a region of interest.

21. A method of manufacturing an electrical circuit comprising:

acquiring an image of at least a portion of an electrical circuit and inspecting said image for defects in said electrical circuit, including;

generating a representation of boundaries of elements in the image; and

analyzing at least one of said boundaries in said representation of boundaries of elements to identify defects in said electrical circuit portion.

22. A method according to claim 21, and wherein said generating is performed in hardware.

23. A method according to claim 21, and wherein said analyzing is performed in software.

24. A method according to claim 22, and wherein said analyzing is performed in software.

25. A method according to claim 21, and wherein said analyzing comprises analyzing at least one characteristic of a location of at least some of said boundaries.

26. A method according to claim 25, and wherein said analyzing a location of at least some of said boundaries comprises comparing at least one characteristic of a location of a selected boundary to at least one characteristic of a location of a corresponding boundary in a reference.

27. A method according to claim 21, and further including identifying a portion of said image of an electrical circuit as being a region of interest.