Universal approach for simulating, emulating, and testing a variety of serial bus types

• US 20040128121A1
• Filed: 12/20/2002
• Published: 07/01/2004
• Est. Priority Date: 08/01/2002
• Status: Active Grant

• Current Assignee: Teradyne Incorporated
• Original Assignee: Teradyne Incorporated
• Inventors: Polyakov, Evgeny, Truebenbach, Eric L., McGoldrick, Michael, Ng, Tung L.
• Granted Patent: US 7,343,279 B2
• Time in Patent Office: Days
• US Class Current: 703/27
• CPC Class Codes: G06F 11/261 by simulating additional hardware, e.g. fault simulation

Abstract

An electronic apparatus for testing equipment for serial busses employs a generic bus model that breaks down a serial bus into separate layers that are managed by separate processors. The processors have parameters that can be programmed for communicating via one type of serial bus, or can be reprogrammed for communicating via another type of serial bus.

Claims

1. A system for emulating different types of serial busses, comprising:

a plurality of components for processing different communication layers of a generic bus model,

wherein each of the plurality of components is arranged to receive data at a data input, perform processing steps on the data, and output data at a data output, and wherein at least one of the plurality of components has at least one adjustable setting for configuring the component for interacting with different types of serial busses.

2. A system as recited in claim 1, wherein at least one of the plurality of components further comprises a record of at least one expected behavior of data received at its data input.

3. A system as recited in claim 2, wherein said at least one of the plurality of components further comprises means for signaling a failure responsive to actual behavior of its input data not matching expected behavior of its input data.

4. A system as recited in claim 1, further comprising means for injecting a fault by varying the at least one adjustable setting.

5. A system as recited in claim 1, wherein at least one of the plurality of components further comprises a handshaking input for receiving incoming handshaking information from a serial bus.

6. A system as recited in claim 5, wherein at least one of the plurality of components further comprises a record of actions to take in response to the handshaking information.

7. A system as recited in claim 6, wherein at least one of the plurality of components further comprises means for detecting handshaking information on input data received at its data input.

8. A system as recited in claim 1, wherein at least one of the plurality of components further comprises a handshaking output for providing outgoing handshaking information to a serial bus.

9. A system as recited in claim 1, wherein at least one of the plurality of components generates at least one event to be conveyed to another of the plurality of components.

10. A system as recited in claim 1, wherein at least one of the plurality of components is implemented at least in part as an electronic circuit for exercising a physical serial bus.

11. A system as recited in claim 1, wherein at least one of the plurality of components is implemented at least in part as a software component for exercising a physical serial bus.

12. A system as recited in claim 1, wherein at least one of the plurality of components is implemented at least in part as a software component for exercising a software simulated serial bus.

13. A system as recited in claim 1, wherein the plurality of components comprises a first plurality of components for processing data to be outputted to a serial bus and a second plurality of components for processing data to be inputted from the serial bus,

wherein each of the first plurality of components handles a different communication layer of the bus model, and

wherein each of the second plurality of components handles a different communication layer of the bus model.

14. An electronic apparatus for exercising serial busses of different types, comprising:

an analog driver having a data input for receiving data indicative of an outgoing serial bus signal and an output for providing the outgoing serial bus signal in response to the data;

an analog receiver having an input for receiving an incoming serial bus signal and an output for providing data indicative of the incoming serial bus signal;

a plurality of processors coupled to the analog driver and the analog receiver, each for processing a different level of serial bus communication in at least one of an incoming and outgoing direction,

wherein each of the plurality of processors is arranged to receive data at a data input, perform processing steps on the data, and output data at a data output, and

wherein each of the plurality of processors has at least one adjustable setting for configuring the processor for interacting with different types of serial busses.

15. An electronic apparatus as recited in claim 14, wherein establishing each at least one adjustable setting to different values enables the electronic apparatus to exercise equipment on any of the plurality of different types of serial busses.

16. An electronic apparatus as recited in claim 14, wherein the plurality of processors comprises:

a first plurality of processors for processing data to compose outgoing data to be applied to the analog driver; and

a second plurality of processors for processing signals from the analog receiver to be stored in the memory.

17. An electronic apparatus as recited in claim 16, wherein the first plurality of processors handles levels of serial communication for outgoing data and the second plurality of processors handles substantially the same levels of serial communication for incoming data.

18. An electronic apparatus as recited in claim 14, wherein the analog driver is a first analog driver and further comprising:

a second analog driver for providing a clock signal to a serial bus; and

at least one additional processor having an output coupled to the second analog driver for controlling timing characteristics of the clock signal.

19. An electronic apparatus as recited in claim 14, wherein the analog receiver is a first analog receiver and further comprising:

a second analog receiver for receiving a clock signal from a serial bus; and

at least one additional processor having an input coupled to the second analog receiver for interpreting timing characteristics of the clock signal.

20. An electronic apparatus as recited in claim 14, wherein the analog driver is a first analog driver and further comprising:

at least one additional analog driver for providing at least one of an envelope and sync output signal to a serial bus; and

at least one additional processor having an output coupled to each at least one additional analog driver for controlling characteristics of said at least one of the envelope and sync output signal.

21. An electronic apparatus as recited in claim 14, wherein the analog receiver is a first analog receiver and further comprising:

at least one additional analog receiver for receiving at least one of an envelope and sync input signal from a serial bus; and

at least one additional processor having an input coupled to said at least one additional analog receiver for interpreting characteristics of said at least one of the envelope and sync input signal.

22. An electronic apparatus as recited in claim 14, wherein the analog driver is a first analog driver and further comprising:

another analog driver for providing outgoing handshaking signals.

23. An electronic apparatus as recited in claim 22, wherein the analog receiver is a first analog receiver, and further comprising:

another analog receiver for receiving incoming handshaking signals.

24. An electronic apparatus as recited in claim 23, wherein the other analog receiver for receiving incoming handshaking signals has an output coupled to at least one of the plurality of processors for conveying handshaking information.

25. An electronic apparatus as recited in claim 23, wherein at least one of the plurality of processors has an output for providing a handshaking signal, and further comprising:

a handshaking processor having at least one input for receiving each such handshaking signal and having an output coupled to the other analog driver for providing outgoing handshaking signals.

26. An electronic apparatus as recited in claim 23, wherein the handshaking processor has an additional input coupled to the output of the other analog receiver for receiving incoming handshaking signals.

27. An electronic apparatus as recited in claim 14, wherein at least one of the plurality of processors has an output for specifying an event related to the characteristic of serial busses that it manages, and at least one of the plurality of processors has an input for receiving events outputted by at least one other of the plurality of processors.

28. An electronic apparatus as recited in claim 22, further comprising an event bus for communicating events among different ones of the plurality of processors.

29. An electronic apparatus as recited in claim 28, wherein the event bus is connectable to external instruments for communicating any of measurements, interrupts, and control signals.

30. An electronic apparatus as recited in claim 28, further comprising:

a handshaking processor for processing handshaking signals,

wherein the events communicated by the event bus include the handshaking signals.

31. A method of testing equipment for any of a variety of different types of serial busses, comprising:

specifying parameters related to characteristics of a serial bus with which the equipment is to be operated;

programming a plurality of processors with the specified parameters; and

exercising the equipment with the parameters programmed,

wherein each of the plurality of processors is for processing a different layer of a serial bus protocol, and different parameters are used to specify protocols for different serial bus types.

32. A method as recited in claim 31, wherein the step of specifying comprises identifying one of a group of serial bus types having associated parameters that have been pre-stored.

33. A method as recited in claim 32, wherein the step of specifying further comprises varying at least one of the parameters to accommodate equipment for a bus that is similar to but not identical to one of the serial bus types having associated parameters that have been pre-stored.

34. A method as recited in claim 31, wherein the step of exercising the equipment comprises injecting faults by varying at least one of the parameters from a nominal value.

35. A method as recited in claim 31, wherein the step of exercising the equipment comprises at least one of the plurality of processors comparing input data provided to the processor with expected behavior to determine whether a failure has occurred.

36. A method as recited in claim 35, wherein the step of exercising the equipment further comprises categorizing a failure responsive to the identity of the processor that reports the fault.

37. A method as recited in claim 31, wherein different processors have different parameters, and the step of exercising the equipment comprises varying at least one of the parameters from a nominal value to examine the behavior of the equipment near the margins of its specification.

38. A method as recited in claim 31, wherein the step of exercising the equipment comprises:

at least one processor generating an output indicative of conditions at its input data, and

monitoring the output indicative of the conditions to determine activities performed by the at least one processor.

39. A method for emulating different types of serial busses, comprising:

representing serial bus communication as including a plurality of communication layers;

processing serial bus data for each of the plurality of communication layers with an independent processor; and

adjusting a plurality of settings of the independent processors for interacting with different types of serial busses.