Manufacturing method of thin-film transistor, thin-film transistor sheet, and electric circuit

• US 20040129978A1
• Filed: 12/19/2003
• Published: 07/08/2004
• Est. Priority Date: 12/26/2002
• Status: Active Grant

• Current Assignee: Flex Display Solutions, LLC (Dominion Harbor Enterprises, LLC)
• Original Assignee: Konica Minolta Holdings Incorporated (Konica Minolta Inc.)
• Inventors: Hirai, Katsura
• Granted Patent: US 7,368,331 B2
• Time in Patent Office: Days
• US Class Current: 257/347
• CPC Class Codes: H01L 21/02244 of a metallic layer
• CPC Class Codes: H01L 21/31683 of metallic layers, e.g. Al deposited on the body, e.g. formation of multi-layer insulating structures
• CPC Class Codes: H01L 21/31687 by anodic oxidation
• CPC Class Codes: H10K 10/464 Lateral top-gate IGFETs comprising only a single gate
• CPC Class Codes: H10K 10/466 Lateral bottom-gate IGFETs comprising only a single gate
• CPC Class Codes: H10K 10/471 the gate dielectric comprising only organic materials
• CPC Class Codes: H10K 10/84 Ohmic electrodes, e.g. source or drain electrodes
• CPC Class Codes: H10K 19/10 comprising field-effect transistors
• CPC Class Codes: H10K 71/60 Forming conductive regions or layers, e.g. electrodes
• CPC Class Codes: H10K 71/611 using printing deposition, e.g. ink jet printing
• CPC Class Codes: H10K 85/1135 Polyethylene dioxythiophene [PEDOT]; Derivatives thereof
• CPC Class Codes: H10K 85/615 Polycyclic condensed aromatic hydrocarbons, e.g. anthracene

Abstract

A thin-film transistor, a thin-film transistor sheet, an electric circuit, and a manufacturing method thereof are disclosed, the method comprising the steps of forming a semiconductor layer by providing a semiconductive material on a substrate, b) forming an isolating area, which is electrode material-repellent, by providing an electrode material-repellent material on the substrate, and c) forming a source electrode on one end of the insulating area and a drain electrode on the other end of the insulating area, by providing an electrode material.

Claims

1. A method of manufacturing a thin-film transistor comprising a substrate, and provided thereon, a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode, the method comprising the steps of:

a) forming the semiconductor layer by providing a semiconductive material on the substrate;

b) forming an insulating area, which is electrode material-repellent, by providing an electrode material-repellent material on the substrate; and

c) forming a source electrode on one end of the insulating area and a drain electrode on the other end of the insulating area, by providing an electrode material.

2. The method of claim 1, wherein the insulating area is comprised of a silicone rubber layer.

3. The method of claim 1, wherein the thickness of the insulating area is from 0.05 to 10 μ

m.

4. The method of claim 1, wherein the providing of the electrode material-repellent material is carried out by an ink jet method.

5. The method of claim 1, further comprising the step of forming an ink receptive layer on the substrate before the formation of the insulating area, wherein the insulating area is formed in the ink receptive layer on the substrate.

6. The method of claim 1, wherein the providing of the semiconductive material is carried out by an ink jet method.

7. The method of claim 1, wherein the providing of the electrode material is carried out by an ink jet method.

8. The method of claim 7, wherein the electrode material is contained in a solvent or a dispersion medium containing 50% by weight of water.

9. The method of claim 1, wherein formation of the insulating area is carried out by providing a light sensitive layer on the substrate, providing an electrode material-repellent insulating layer on the light sensitive layer, exposing the resulting material and developing the exposed material.

10. The method of claim 9, wherein the exposing is carried out employing laser.

11. The method of claim 9, wherein the light sensitive layer is an ablation layer.

12. The method of claim 1, wherein after the semiconductor layer has been formed, the insulating area is formed on the resulting semiconductor layer.

13. The method of claim 1, wherein after the semiconductor layer has been formed, an ink receptive layer is provided on the resulting semiconductor layer, and then the insulating area is formed in the ink receptive layer on the semiconductor layer.

14. The method of claim 1, wherein after the semiconductor layer has been formed, an intermediate layer is provided on the semiconductor layer so as to protect the resulting semiconductor layer, and then the insulating area is formed on the intermediate layer.

15. The method of claim 1, wherein the semiconductor layer is an organic semiconductor layer containing an organic semiconductive material.

16. The method of claim 1, wherein the substrate is a resin sheet comprised of a resin.

17. A method of manufacturing a thin-film transistor sheet comprising a gate busline, a drain busline, and a thin-film transistor comprising a substrate and provided thereon, a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode, the plural thin-film transistors being connected with each other through the gate busline and the source busline, the method comprising the steps of:

a) forming the semiconductor layer by providing a semiconductive material on the substrate;

b) forming an insulating area, which is electrode material-repellent, by providing an electrode material-repellent material on the substrate; and

c) forming a source electrode on one end of the insulating area and a drain electrode on the other end of the insulating area by providing an electrode material.

18. The method of claim 17, wherein the insulating area is comprised of a silicone rubber layer.

19. The method of claim 17, wherein the thickness of the insulating area is from 0.5 to 10 μ

m.

20. The method of claim 17, wherein the providing of the electrode material-repellent material is carried out by an ink jet method.

21. The method of claim 17, further comprising the step of forming an ink receptive layer on the substrate before the formation of the insulating area, wherein the insulating area is formed in the ink receptive layer on the substrate.

22. The method of claim 17, wherein the providing of the semiconductive material is carried out by an ink jet method.

23. The method of claim 17, wherein the providing of the electrode material is carried out by an ink jet method.

24. The method of claim 23, wherein the electrode material is contained in a solvent or a dispersion medium containing 50% by weight of water.

25. The method of claim 17, wherein formation of the insulating area is carried out by providing a light sensitive layer on the substrate, providing an electrode material-repellent insulating layer on the light sensitive layer, exposing the resulting material and developing the exposed material.

26. The method of claim 25, wherein the exposing is carried out employing laser.

27. The method of claim 25, wherein the light sensitive layer is an ablation layer.

28. The method of claim 17, wherein after the semiconductor layer has been formed, the insulating area is formed on the resulting semiconductor layer.

29. The method of claim 17, wherein after the semiconductor layer has been formed, an ink receptive layer is provided on the resulting semiconductor layer, and then the insulating area is formed in the ink receptive layer on the semiconductor layer.

30. The method of claim 17, wherein after the semiconductor layer has been formed, an intermediate layer is provided on the semiconductor layer so as to protect the resulting semiconductor layer, and then the insulating area is formed on the intermediate layer.

31. The method of claim 17, wherein the semiconductor layer is an organic semiconductor layer containing an organic semiconductive material.

32. The method of claim 17, wherein the substrate is a resin sheet comprised of a resin.

33. The method of claim 17, wherein the semiconductor layer is formed so as to cross the gate busline.

34. The method of claim 17, wherein the source electrode forms a pixel electrode or the source electrode is connected to a pixel electrode, wherein the pixel electrode is separated by the insulating area from the drain electrode which is connected to the source busline.

35. The method of claim 17, wherein the substrate is transported during manufacture.

36. The method of claim 17, wherein the substrate is transported in the direction crossing the gate busline to linearly form the insulating area.

37. A method of manufacturing an electric circuit comprising a substrate, and provided thereon, an electrode, the method comprising the steps of:

a) forming an insulating area, which is electrode material-repellent, by providing an electrode material-repellent material on the substrate; and

b) forming an electrode by providing an electrode material on the substrate.

38. The method of claim 37, wherein the insulating area is comprised of a silicone rubber layer.

39. The method of claim 37, wherein the thickness of the insulating area is from 0.05 to 100 μ

m.

40. The method of claim 37, wherein the providing of the electrode material-repellent material is carried out by an ink jet method.

41. The method of claim 37, wherein the formation of the insulating area is carried out by providing an ink receptive layer on the substrate, and providing an electrode material-repellent material in the ink receptive layer.

42. The method of claim 37, wherein the providing of the electrode material is carried out by an ink jet method.

43. The method of claim 37, wherein the formation of the insulating area is carried out by providing a light sensitive layer on the substrate, providing an electrode material-repellent insulating layer on the light sensitive layer, exposing the resulting material and developing the exposed material.

44. The method of claim 43, wherein the exposing is carried out employing laser.

45. The method of claim 43, wherein the light sensitive layer is an ablation layer.

46. The method of claim 37, wherein the substrate is a resin sheet comprised of a resin.

47. A thin-film transistor comprising a substrate, and provided thereon, an insulating area, which is electrode material-repellent, a semiconductor layer, a source electrode and a drain electrode wherein each of the source electrode and the drain electrode, which is comprised of an electrode material, is connected to the semiconductor layer and wherein the drain electrode is separated from the source electrode by the insulating area.

48. The thin-film transistor of claim 47, wherein the insulating area is comprised of a silicone rubber layer.

49. The thin-film transistor of claim 47, wherein the thickness of the insulating area is 0.05 to 10 μ

m.

50. The thin-film transistor of claim 47, further comprising a light sensitive layer.

53. A thin-film transistor comprising two or more of the organic thin-film transistor of claim 47.

51. A thin-film transistor comprising a substrate, and provided thereon, a gate electrode, a gate insulating layer, a semiconductor layer, and an insulating area, which is electrode material-repellent, in that order, wherein the thin-film transistor further comprises a drain electrode and a source electrode in which the drain electrode is separated from the source electrode by the insulating area.

52. The thin-film transistor of claim 51, further comprising a light sensitive layer.

54. A thin-film transistor sheet comprising two or more of the organic thin-film transistor of claim 51.

55. A thin-film transistor sheet comprising an insulating area, which is electrode-repellent, a source busline, plural drain electrodes comprised of an electrode material, and plural source electrodes comprised of an electrode material, the source busline being connected to the plural drain electrodes, and each of the plural drain electrodes being connected to a respective pixel electrode, wherein the respective pixel electrode is separated from the source busline by the insulating area.