High-voltage output circuit for a driving circuit of a plasma

• US 20040129996A1
• Filed: 10/24/2003
• Published: 07/08/2004
• Est. Priority Date: 05/03/2001
• Status: Abandoned Application

• Current Assignee: Orion Electric (Orion Denki KK)
• Original Assignee: Orion Electric (Orion Denki KK)
• Inventors: Shin, Hong Jae
• Application Number:
  US10/476,098
• Publication Number:
  US 20040129996A1
• Time in Patent Office: Days
• US Class Current: 257/500
• CPC Class Codes: G09G 2310/0289 Details of voltage level shifters arranged for use in a driving circuit
• CPC Class Codes: G09G 3/296 Driving circuits for producing the waveforms applied to the driving electrodes

Abstract

A high-voltage output circuits according to the present invention comprise a high-voltage level shifter and a high-voltage output means including a high-voltage NMOS as a pull-up element, or a bootstrapping circuit, wherein the same input voltage as a predetermined output voltage and a data signal are inputted and an output voltage of a high-voltage pulse corresponding to the data signal is outputted, and which can prevent a drop in a threshold voltage of the high-voltage element with using high-voltage NMOS transistors only and therefore can reduce an area as compared with a structure using high-voltage PMOS transistors for a full swing.

Claims

1. A high-voltage output circuit for a driving circuit of a plasma display panel and the like, which comprises a high-voltage level shifter 10 and a high-voltage output means 20 including a high-voltage NMOS as a pull-up element, wherein the same input voltage V_H as a predetermined output voltage HV_out and a data signal are inputted and an output voltage HV_out of a high-voltage pulse corresponding to the data signal is outputted, said high-voltage output circuit being characterized by further comprising:

a boosting voltage generator 30 between the input voltage V_H and the high-voltage level shifter 10 for raising the input voltage V_H to a higher voltage (V_H+V_THN) by a threshold voltage V_THN of a high-voltage NMOS transistor so as to prevent a voltage drop in the output voltage HV_out of the high-voltage NMOS of the high-voltage output means 20.

2. A high-voltage output circuit for a driving circuit of a plasma display panel and the like according to claim 1, said high-voltage level shifter 10 comprising:

a LVPMOS1 and a LVPMOS2 transistors for constituting a latch;

a HVPMOS1 and a HVPMOS2 transistors for clamping a gate voltage of, and protecting, the LVPMOS1 and the LVPMOS2 transistors;

a LVNMOS1 and a LVNMOS2 transistors for turning on/off the LVPMOS1 transistor and turning off/on the LVPMOS2 transistor by means of the HVPMOS1 and the HVPMOS2 transistors by becoming off and on/on and off by means of a low signal(0V)/a high signal of the data line, respectively;

a HVNMOS1 and a HVPMOS3 transistors to become off/on and on/off by means of the low signal(0V)/the high signal of the data line, respectively, so as to apply the higher voltage (V_H+V_THN) to a gate of the high-voltage NMOS transistor of the high-voltage output means 20 from said HVPMOS3 transistor when the data line is a low signal(0V).

3. A high-voltage output circuit for a driving circuit of a plasma display panel and the like according to claim 1 or claim 2, wherein said high-voltage output circuit is included by a scan driving IC and a data driving IC as a driving IC of a plasma display panel.

4. A high-voltage output circuit for a driving circuit of a plasma display panel and the like according to claim 1 or claim 2, wherein said high-voltage output circuit is included by a scan driving IC and a data driving IC as a driving IC of a flat display.

5. A high-voltage output circuit for a driving circuit of a plasma display panel and the like, which comprises a high-voltage level shifter 110 and a high-voltage output means 120 including a high-voltage NMOS transistor as a pull-up element, wherein the same input voltage V_H as a predetermined output voltage HV_out and a data signal are inputted and an output voltage HV_out of a high-voltage pulse corresponding to the data signal is outputted, said high-voltage output circuit being characterized by further comprising:

a bootstrapping high-voltage level shifter 130 between the high-voltage level shifter 110 and the high-voltage output means 120 for raising the input voltage V_H to a higher voltage (V_H+V_THN) by a threshold voltage V_THN of a high-voltage NMOS transistor so as to prevent a voltage drop in the output voltage HV_out of the high-voltage NMOS of the high-voltage output means 120.

6. A high-voltage output circuit for a driving circuit of a plasma display panel and the like according to claim 5, said bootstrapping high-voltage level shifter 130 comprising a charge pumping means C_pump having a buffer and a capacitor for the bootstrapping, thereby applying a higher voltage (V_H+V_THN) by the threshold voltage V_THN than the final output voltage HV_out to a gate part of the high-voltage NMOS transistor or the pull-up element of the high-voltage output means and outputting the input voltage V_H without dropping the threshold voltage V_THN on outputting the high-voltage.

7. A high-voltage output circuit for a driving circuit of a plasma display panel and the like according to claim 5 or claim 6, said high-voltage level shifter 110 comprising:

a LVP1 and a LVP2 transistors for constituting a latch;

a HVP1 and a HVP2 transistors for clamping a gate voltage of, and protecting, the LVP1 and the LVP2 transistors;

a LVN1 and a LVN2 transistors for turning on/off the LVP1 transistor and turning off/on the LVP2 transistor by means of the HVP1 and the HVP2 transistors by becoming off and on/on and off by means of a low signal(0V)/a high signal of the data line, respectively;

a HVN1 and a HVP3 transistors to become off/on and on/off by means of the low signal(0V)/the high signal of the data line, respectively, so as to apply a voltage (V_H+V_THN) to a gate of the high-voltage NMOS transistor of the high-voltage output means 120 from said HVP3 transistor when the data line is a low signal(0V).

8. A high-voltage output circuit for a driving circuit of a plasma display panel and the like according to claim 5 or claim 6, wherein said high-voltage output circuit is included by a scan driving IC and a data driving IC as a driving IC of a plasma display panel and by a scan driving IC and a data driving IC as a driving IC of a flat display.