PWM-based DC-DC converter with assured dead time control exhibiting no shoot-through current and independent of type of fet used
First Claim
1. A control circuit for a switch mode DC-DC converter comprising an arrangement of monitored LGATE, UGATE and PHASE node condition threshold detectors, outputs of which are processed in accordance with a switching control operator to ensure that each of an upper FET (UFET) and a lower FET (LFET) is completely turned off before the other FET begins conduction, thereby maintaining a dead time that exhibits no shoot-through current and is independent of the type of switching FET.
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Abstract
A control circuit for a switch mode DC-DC converter contains an arrangement of monitored LGATE, UGATE and PHASE node condition threshold detectors, outputs of which are processed in accordance with a switching control operator to ensure that each of an upper FET (UFET) and a lower FET (LFET) is completely turned off before the other FET begins conduction, thereby maintaining a dead time that exhibits no shoot-through current and is independent of the type of switching FET.
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Citations
11 Claims
- 1. A control circuit for a switch mode DC-DC converter comprising an arrangement of monitored LGATE, UGATE and PHASE node condition threshold detectors, outputs of which are processed in accordance with a switching control operator to ensure that each of an upper FET (UFET) and a lower FET (LFET) is completely turned off before the other FET begins conduction, thereby maintaining a dead time that exhibits no shoot-through current and is independent of the type of switching FET.
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7. A method for controlling a switch mode DC-DC converter having an upper FET (UFET) and a lower FET (LFET) coupled between power supply voltage rails, and having a common phase node therebetween, said method comprising the steps of:
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(a) monitoring LGATE, UGATE and PHASE node voltages; and
(b) subsequent to turn off of said LFET, and in response to the voltage at the PHASE node having reached a prescribed negative polarity voltage following a blanking delay, triggering turn-on of the UFET, so as to cause said phase node voltage to go high. - View Dependent Claims (8, 9)
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10. A method for controlling a switch mode DC-DC converter having an upper FET (UFET) and a lower FET (LFET) coupled between power supply voltage rails, and having a common phase node therebetween, said method comprising the steps of:
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(a) monitoring LGATE, UGATE and PHASE node voltages; and
(b) subsequent to turn-off of said UFET, and in response to the UGATE voltage dropping to a voltage level that is a prescribed value above the phase voltage, triggering a prescribed time out and then turning on said LFET.
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11. A method for controlling a switch mode DC-DC converter having an upper FET (UFET) and a lower FET (LFET) coupled between power supply voltage rails, and having a common phase node therebetween, said method comprising the steps of:
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(a) monitoring LGATE, UGATE and PHASE node voltages; and
(b) subsequent to turn-off of said UFET, and in response to the level of the PHASE node voltage reaching a predetermined threshold voltage, turning on said LFET.
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Specification