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Single event upset hardened latch

  • US 20040130351A1
  • Filed: 12/19/2003
  • Published: 07/08/2004
  • Est. Priority Date: 12/23/1999
  • Status: Active Grant
First Claim
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1. A latch circuit, comprising:

  • a first latch; and

    a second latch to harden the latch circuit to a single event upset, the second latch including a transmission gate having an output port to couple to only one transistor of the first latch.

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