Probe card for semiconductor wafers and method and system for testing wafers
First Claim
1. A probe card for testing a semiconductor wafer comprising:
- a substrate comprising a contact member and a first conductor formed on the substrate in electrical communication with the contact member; and
a membrane for physically and electrically attaching the substrate to a test fixture, said membrane comprising tape with a second conductor thereon electrically attached to the first conductor.
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Accused Products
Abstract
A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.
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Citations
73 Claims
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1. A probe card for testing a semiconductor wafer comprising:
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a substrate comprising a contact member and a first conductor formed on the substrate in electrical communication with the contact member; and
a membrane for physically and electrically attaching the substrate to a test fixture, said membrane comprising tape with a second conductor thereon electrically attached to the first conductor. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A probe card for testing a semiconductor wafer having a bumped contact location comprising:
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a substrate comprising a contact member configured to electrically connect to the bumped contact location, said contact member comprising an indentation formed in the substrate and covered with a conductive layer; and
a membrane for mounting the substrate to a test fixture, said membrane comprising tape with a conductor thereon configured to establish electrical communication with the conductive layer. - View Dependent Claims (9, 10, 11)
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12. A probe card for testing semiconductor dice contained on a wafer, comprising:
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a substrate comprising a pattern of contact members configured to electrically contact a pattern of contact locations on the wafer, said contact members comprising raised members covered with conductive layers in electrical communication with a pattern of conductors;
a compressible member attached to a surface of the substrate; and
a membrane for attaching the substrate to a testing apparatus, said membrane comprising an elastomeric tape having a second pattern of conductors attached thereto, said second pattern of conductors in electrical communication with test circuitry and bonded to the pattern of conductors on the substrate. - View Dependent Claims (13, 14, 15, 16)
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17. A probe card for testing semiconductor dice contained on a wafer, comprising:
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a mounting plate including a first conductor formed thereon;
a substrate attached to the mounting plate comprising a raised contact member covered with a conductive layer in electrical communication with a second conductor;
an electrical path formed between the first conductor and the second conductor; and
an electrically insulating tape having a third conductor formed thereon, said third conductor electrically connected to the first conductor. - View Dependent Claims (18, 19)
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20. A probe card for testing a semiconductor wafer comprising:
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a substrate comprising a contact member configured to retain and electrically connect to a bumped contact location on the wafer, said contact member comprising a compliant pin attached to the substrate; and
a membrane for mounting the interconnect substrate to a test fixture, said membrane comprising polymer tape with a metal foil conductor attached thereto configured to establish electrical communication with the conductive layer. - View Dependent Claims (21, 23, 24, 25, 26)
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22. A probe card for testing semiconductor dice contained on a wafer, comprising:
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a substrate comprising a plurality of patterns of contact members configured to electrically connect to a plurality of patterns of contact locations on the dice;
said contact members comprising raised members with penetrating projections sized and shaped to penetrate the contact locations to a self limiting penetration depth;
said contact members further comprising conductive layers in electrical communication with a first pattern of conductors formed on the substrate;
a mounting plate attached to the substrate comprising a second pattern of conductors bonded to the first pattern of conductors; and
a membrane comprising an electrically insulating tape with a third pattern of conductors formed thereon bonded to the first pattern of conductors on the mounting plate.
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27. A probe card for testing semiconductor dice contained on a semiconductor wafer comprising:
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a substrate configured to test every die on the wafer at a same time, said substrate comprising a plurality of raised contact members covered with conductive layers, said substrate further comprising a plurality of conductors in electrical communication with the contact members, said contact members including projections sized and shaped to penetrate into contact locations on the wafer while surfaces of the contact members limit further penetration; and
a membrane for physically and electrically connecting the substrate to a testing apparatus, said membrane comprising an electrically insulating tape having a pattern of conductors formed thereon bonded to the plurality of conductors on the substrate. - View Dependent Claims (28, 29, 30, 31, 32)
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33. A probe card for testing semiconductor dice contained on a wafer, comprising:
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a substrate comprising a plurality of patterns of contact members configured to electrically connect to a plurality of patterns of contact locations on the dice;
a plurality of external contacts formed on the substrate in electrical communication with the contact members;
a mounting plate for mounting the substrate to a testing apparatus, said mounting plate including a pattern of conductors configured to electrically contact the external contacts on the substrate; and
a membrane bonded to the mounting plate for providing electrical paths from test circuitry to the conductors on the mounting plate. - View Dependent Claims (34, 35, 36)
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37. A probe card for testing semiconductor dice contained on a wafer, comprising:
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a mounting plate having a sealed space formed therein;
a substrate comprising a plurality of patterns of contact members configured to electrically connect to a plurality of patterns of contact locations on the dice, said substrate slidably mounted to the mounting plate within the sealed space;
a gas supply in flow communication with the sealed space for exerting a biasing force on the substrate; and
a membrane bonded to the mounting plate for providing electrical paths from test circuitry to the contact members. - View Dependent Claims (38, 39, 40)
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41. A probe card for testing a semiconductor wafer comprising:
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a substrate comprising a plurality of contact members in electrical communication with a first pattern of conductors;
a membrane for physically and electrically attaching the substrate to a test fixture, said membrane comprising tape with a second pattern of conductors thereon bonded to the first pattern of conductors; and
a leveling mechanism for planarizing the contact members with respect to the wafer. - View Dependent Claims (42, 43)
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44. A method for testing a semiconductor wafer comprising:
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providing a testing apparatus comprising a force applying mechanism and test circuitry;
providing a substrate comprising contact members configured to establish temporary electrical communication with contact locations on the wafer, said contact members comprising raised members with penetrating projections;
bonding a membrane to the substrate and testing apparatus, said membrane configured to provide an electrical path to the contact members and to mount the substrate to the testing apparatus;
biasing the substrate against the wafer; and
applying test signals through the membrane and contact members to the contact locations on the wafer. - View Dependent Claims (45, 46, 47)
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48. A method for testing a semiconductor wafer comprising:
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providing a testing apparatus comprising a force applying mechanism and test circuitry;
providing a substrate comprising indentation contact members configured to retain bumped contact locations on the wafer and to establish temporary electrical communication with the bumped contact locations;
bonding a membrane to the substrate and testing apparatus, said membrane configured to provide an electrical path to the contact members and to mount the substrate to the testing apparatus;
biasing the substrate against the wafer; and
applying test signals through the membrane and contact members to the contact locations on the wafer. - View Dependent Claims (49, 50)
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51. A method for testing semiconductor dice comprising:
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providing a probe card comprising a substrate with a raised contact member covered with a conductive layer in electrical communication with a conductor, said raised contact member having a height of from 10 μ
m to 100 μ
m, and having a penetrating projection formed thereon with a height of from 0.1 μ
m to 1 μ
m, said projection configured to penetrate a contact location on the wafer to a limited penetration depth;
physically and electrically connecting the probe card to a testing apparatus using a membrane having a second conductor bonded to the conductor on the substrate; and
applying test signals through the second conductor, through the conductor, and through the contact member to the contact locations. - View Dependent Claims (52, 53, 54, 55)
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56. A method for testing a semiconductor wafer having a plurality of semiconductor dice, said method comprising:
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providing a testing apparatus configured to apply test signals to the dice;
providing a substrate including a plurality of contact members configured to electrically connect to all of the dice on the wafer at a same time; and
providing a membrane for mounting and electrically connecting the substrate to the test fixture, said membrane comprising electrically insulating tape with a plurality of conductors thereon configured to establish electrical communication with the contact members;
applying test signals through the contact members to at least one selected die on the wafer; and
electronically switching the test signals to another die on the wafer.
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57. A system for testing a semiconductor wafer, comprising:
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a testing apparatus comprising test circuitry and a force applying mechanism;
a substrate comprising a raised contact member having a penetrating projection configured to penetrate a contact location on the wafer and a surface configured to limit a penetration depth of the penetration projection into the contact location; and
a membrane for mounting and electrically connecting the substrate to the test fixture, said membrane comprising electrically insulating tape with a conductor thereon configured to establish electrical communication with the contact member. - View Dependent Claims (58, 59, 60)
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61. A system for testing a semiconductor wafer;
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a testing apparatus comprising test circuitry, a probe card fixture and a force applying mechanism;
a substrate mounted to the probe card fixture, said substrate comprising a raised contact member covered with a conductive layer in electrical communication with a conductor, said raised contact member having a height of from 10 μ
m to 100 μ
m, and having a penetrating projection formed thereon with a height of from 0.1 μ
m to 1 μ
m, said projection configured to penetrate a contact location on the wafer to a limited penetration depth; and
a membrane for physically and electrically connecting the substrate to the probe card fixture, said membrane comprising polyimide having a copper conductor formed thereon bonded to the conductor on the substrate. - View Dependent Claims (62, 63, 64, 65, 66, 67)
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68. A system for testing a semiconductor wafer, containing semiconductor dice, comprising:
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a testing apparatus comprising test circuitry and a force applying mechanism;
a substrate comprising a contact member configured to retain and electrically connect to a bumped contact location on the wafer, said contact member comprising an indentation covered with a conductive layer;
a membrane for mounting and electrically connecting the substrate to the test fixture, said membrane comprising electrically insulating tape with a conductor thereon configured to establish electrical communication with the contact member. - View Dependent Claims (69, 70, 71)
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72. A system for testing a semiconductor wafer, comprising:
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a testing apparatus comprising test circuitry and a force applying mechanism;
a substrate including a contact member comprising a compliant member configured to electrically connect to a contact location on the wafer; and
a membrane for mounting and electrically connecting the substrate to the test fixture, said membrane comprising a polymer film with a metal foil conductor thereon configured to establish electrical communication with the contact member. - View Dependent Claims (73)
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Specification