Display fabrication using modular active devices

• US 20040140763A1
• Filed: 01/13/2004
• Published: 07/22/2004
• Est. Priority Date: 12/27/2000
• Status: Active Grant

• Current Assignee: AU Optronics Corporation
• Original Assignee: Evan G. Colgan, Robert L. Wisnieff, Stephen L Buchwalter, Sung Kwon Kang
• Inventors: Wisnieff, Robert L., Colgan, Evan G., Kang, Sung Kwon, Buchwalter, Stephen L.
• Granted Patent: US 6,879,098 B2
• Time in Patent Office: Days
• US Class Current: 313/506
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: H10K 59/00 Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
• CPC Class Codes: H10K 59/129 Chiplets
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/4981 Utilizing transitory attached element or associated separate material
• CPC Class Codes: Y10T 29/49895 Associating parts by use of aligning means [e.g., use of a drift pin or a "fixture"]

Abstract

A method for fabricating a display device patterns a conductive layer on a display substrate and forms pixel electrodes on the display substrate. A plate is employed for carrying separately fabricated active devices to the display substrate. The separately fabricated devices are connected to the conductive layers and the pixel electrode.

Claims

1. A method for fabricating a display device comprising the steps of:

patterning a conductive layer on a display substrate;

forming pixel electrodes on the display substrate;

aligning a plate carrying separately fabricated devices to the display substrate; and

connecting the separately fabricated devices to the conductive layers and the pixel electrode.

2. The method as recited in claim 1, wherein the separately fabricated devices include chiplets.

3. The method as recited in claim 2, wherein the chiplets include a transistor.

4. The method as recited in claim 2, wherein the chiplets include a capacitor.

5. The method as recited in claim 2, wherein the chiplets include a cross-over connector which provides a connection between conductors formed on the display substrate.

6. The method as recited in claim 1, further comprising the steps of:

forming conductive attachments on the display substrate and the separately fabricated devices; and

aligning and connecting the separately fabricated devices with the display substrate by the conductive attachments.

7. The method as recited in claim 6, wherein the conductive attachments on one of the display substrate and the separately fabricated devices include at least one of solder bumps, conductive adhesive bumps and thermocompression bond pads.

8. The method as recited in claim 1, wherein the plate carrying separately fabricated devices includes holes and the method further comprising the step of applying vacuum through the holes to carry the separately fabricated devices.

9. The method as recited in claim 1, wherein the step of patterning a conductive layer on a display substrate includes patterning gate lines and data lines from the conductive layer.

10. The method as recited in claim 1, further comprising the step of removing a separately fabricated device from the display substrate.

11. The method as recited in claim 1, further comprising the step of disengaging the separately fabricated devices from the plate.

12. A method for fabricating a display device, comprising the steps of:

providing a first substrate having chiplets formed in a pattern on a parting layer;

attaching a first plate to a top side of the chiplets;

separating the chiplets from the first substrate at the parting layer;

attaching a back side of selected chiplets to a second plate; and

aligning and connecting the front side of the selected chiplets to a display substrate.

13. The method as recited in claim 12, wherein the chiplets include a transistor.

14. The method as recited in claim 12, wherein the chiplets include a capacitor.

15. The method as recited in claim 12, wherein the chiplets include a cross-over connector which provides a connection between conductors formed on the display substrate.

16. The method as recited in claim 12, further comprising the steps of:

forming conductive attachments on the display substrate and the separately fabricated devices; and

aligning and connecting the separately fabricated devices with the display substrate by the conductive attachments.

17. The method as recited in claim 16, wherein the conductive attachments on one of the display substrate and the separately fabricated devices include at least one of solder bumps, conductive adhesive bumps and thermocompression bond pads.

18. The method as recited in claim 12, wherein the first plate includes holes and the method further comprising the step of applying vacuum through the holes to carry the chiplets.

19. The method as recited in claim 12, wherein the display substrate includes a patterned conductive layer and pixel electrodes and the method further comprising the step of patterning the conductive layer on the display substrate to form gate lines and data lines from the conductive layer.

20. The method as recited in claim 12, further comprising the step of removing a chiplet from the display substrate.

21. The method as recited in claim 12, further comprising the step of removing the selected chiplets from the second plate.

22. A display device, comprising:

gate lines and data lines patterned from a single layer of conductive material;

pixel electrodes formed in operative relationship with the gate lines and data lines; and

a plurality of chiplets connected to the gate lines, the data lines and the pixel electrodes such that the chiplets activate the pixel electrodes in accordance with the gate lines and the data lines.

23. The display device as recited in claim 22, wherein the display device includes one of an active matrix liquid crystal display and an organic light emitting diode display.

24. The display device as recited in claim 22, wherein the plurality of chiplets are connected to the gate lines, the data lines and the pixel electrodes by conductive attachments.

25. The display device as recited in claim 24, wherein the conductive attachments include at least one of solder bumps, conductive adhesive bumps and thermocompression bond pads.

26. The display device as recited in claim 22, wherein the plurality of chiplets provide a cross-over connection between data line segments.

27. The display device as recited in claim 22, wherein the chiplets each include a transistor which is connected to at least a data line and a gate line.

28. The display device as recited in claim 22, wherein the chiplets each include a storage capacitor.

29. The display device as recited in claim 22, wherein the chiplets include a size related to a fraction of sub-pixel size for sub-pixels of the display device.