Decoder
First Claim
1. A decoder for temporarily storing in a buffer memory in sector units digital data having a predetermined number of bytes processing the digital data by correcting and detecting code errors included in the digital data, and transferring the processed digital data, the decoder comprising:
- a check head register for storing a first address of the buffer memory when the storing of the processed digital data to the buffer memory is started;
a check sector counter for counting the number of sectors of the processed digital data stored in the buffer memory to generate a count value;
a command decision circuit connected to the check head register and the check sector counter for deciding whether the digital data requested to be transferred is stored in the buffer memory based on the first address, the count value, and a head address of the digital data requested to be transferred; and
a command register connected to the command decision circuit for storing a data transfer request command, wherein the command decision circuit permits the decoder to transfer the processed digital data when deciding that the digital data requested to be transferred is stored in the buffer memory.
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Accused Products
Abstract
A decoder for decreasing the load on a microcomputer. The decoder stores in a buffer memory in sector units digital data. The decoder includes a check head register for storing a first address of the buffer memory when storing the processed digital data in the buffer memory. A check sector counter counts the number of sectors of the processed digital data stored in the buffer memory to generate a count value. A command decision circuit decides whether digital data requested to be transferred is stored in the buffer memory based on the first address, the count value, and a head address of the digital data. The command decision circuit permits the decoder to transfer the processed digital data when deciding that the digital data requested to be transferred is stored in the buffer memory.
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Citations
6 Claims
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1. A decoder for temporarily storing in a buffer memory in sector units digital data having a predetermined number of bytes processing the digital data by correcting and detecting code errors included in the digital data, and transferring the processed digital data, the decoder comprising:
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a check head register for storing a first address of the buffer memory when the storing of the processed digital data to the buffer memory is started;
a check sector counter for counting the number of sectors of the processed digital data stored in the buffer memory to generate a count value;
a command decision circuit connected to the check head register and the check sector counter for deciding whether the digital data requested to be transferred is stored in the buffer memory based on the first address, the count value, and a head address of the digital data requested to be transferred; and
a command register connected to the command decision circuit for storing a data transfer request command, wherein the command decision circuit permits the decoder to transfer the processed digital data when deciding that the digital data requested to be transferred is stored in the buffer memory. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification
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- Resources
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Current AssigneeSanyo Electric Company Limited (Panasonic Holdings Corporation)
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Original AssigneeSanyo Electric Company Limited (Panasonic Holdings Corporation)
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InventorsIshibashi, Masayuki, Suzuki, Takayuki, Tsuda, Hiroyuki
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Application NumberUS10/748,339Publication NumberTime in Patent OfficeDaysField of SearchUS Class Current369/47.34CPC Class CodesG11B 20/10527 Audio or video recording; D...G11B 20/1833 by adding special lists or ...G11B 2020/10685 input interface, i.e. the w...G11B 2020/10731 wherein the buffer I/O can ...G11B 2020/10759 content dataG11B 2220/2545 CDsG11B 2220/2562 DVDs [digital versatile dis...
