Use of synchronized clocks to provide input and output time stamps for performance measurement of traffic within a communications system

• US 20040141527A1
• Filed: 10/27/2003
• Published: 07/22/2004
• Est. Priority Date: 10/25/2002
• Status: Active Grant

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: General Instrument Corporation (CommScope Holding Company, Inc.)
• Inventors: Bennett, Jon Claude Russell, White, Gerard
• Granted Patent: US 7,394,770 B2
• Time in Patent Office: Days
• US Class Current: 370/503
• CPC Class Codes: H04J 3/0685 Clock or time synchronisation in a node; Intranode synchronisation
• CPC Class Codes: H04J 3/0688 Change of the master or reference, e.g. take-over or failure of the master
• CPC Class Codes: H04J 3/0697 Synchronisation in a packet node
• CPC Class Codes: H04L 41/0213 Standardised network management protocols, e.g. simple network management protocol [SNMP]
• CPC Class Codes: H04L 43/087 Jitter
• CPC Class Codes: H04L 43/10 Active monitoring, e.g. heartbeat, ping or trace-route
• CPC Class Codes: H04L 43/106 using time related information in packets, e.g. by adding timestamps
• CPC Class Codes: H04L 43/50 Testing arrangements
• CPC Class Codes: H04L 69/16 Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
• CPC Class Codes: H04L 69/161 Implementation details of TCP/IP or UDP/IP stack architecture; Specification of modified or new header fields

Abstract

A method (60; 70) for processing data packets allows the same hardware that is used in a traffic-forwarding path to add timestamps to the data, which allow accurate measurements to be taken. By adding this function in the forwarding equipment itself, the measurements can be taken in a true operational network, i.e., under actual usage conditions. Moreover, if multiple systems in the traffic path support this functionality, the value of the measurements is enhanced to enable end-to-end path guarantees. One exemplary embodiment (10) of the present invention uses synchronized clocks to provide timestamps for use in performance monitoring within an operational system. Synchronized clock signals can be used to accurately time stamp incoming and outgoing packets to provide performance measurement of traffic through the system under actual operating conditions.

Claims

1. A method (60) for processing one or more packets in a network comprising:

inserting (61) a first time stamp upon receipt of the packet by a network device; and

inserting (62) a second time stamp upon transmitting of the packet by the network device.

2. The method according to claim 1, wherein (62) the first time stamp and the second time stamp are both derived from a single clock source.

3. The method according to claim 1, wherein (62) the first time stamp and the second time stamp are derived from different clock sources operating synchronously with respect to each other.

4. The method according to claim 1, further comprising inspecting (63) a header of the packet upon receipt of the packet and inserting the first time stamp and the second time stamp if the header indicates a time stamp should be inserted.

5. The method according to claim 1, further comprising inspecting (63) a header of the packet upon receipt of the packet and not inserting the first time stamp or the second time stamp unless the header indicates a time stamp should be inserted.

6. A computer network (80) comprising a plurality of network devices (81, 83) to receive and forward a plurality of packets, each of said plurality of network devices (81,83) including:

an input/output module (81a) to insert a first time stamp upon receipt of each of the plurality of packets and to insert a second time stamp prior to transmission of said each of the plurality of packets; and

a clock source (81b) coupled to the input/output module, said clock source to generate a clock signal from which the first time stamp and the second time stamp are derived.

7. The computer network according to claim 6, wherein said input/output module (81a) inspects a header of the packet upon receipt and inserts the first time stamp and the second time stamp if the header indicates a time stamp should be inserted.

8. A method (60;

70) for determining performance of a network device for processing a plurality of packets comprising;

inserting (61;

71) a first time stamp in a received packet upon receipt; and

inserting (62;

71) a second time stamp in the received packet just prior to transmitting the received packet.

9. The method according to claim 8, further comprising inspecting (63;

71) a header of the packet upon receipt and inserting the first time stamp and the second time stamp if the header indicates a time stamp should be inserted.

10. The method (70) according to claim 8, further comprising:

comparing (72) the first time stamp to the second time stamp to obtain a difference between the first and second time stamps.

11. The method (70) according to claim 10, further comprising (73) recording the difference in the received packet.

12. The method (70) according to claim 10, further comprising (73) overwriting one of the first and second time stamps with the difference.

13. A method (70) for measuring a performance of a network device for processing a plurality of Internet Protocol packets comprising:

inserting (71) a first time stamp in a received Internet Protocol packet upon receipt;

comparing (72) the first time stamp to a clock just prior to transmitting the received Internet Protocol packet; and

overwriting (73) the first time stamp with a difference between the first time stamp and the clock just prior to transmission of the Internet Protocol packet.

14. The method according to claim 13, further comprising (71) inspecting a header of the Internet Protocol packet upon receipt and inserting the first time stamp and the second time stamp if the header indicates a time stamp should be inserted.

15. An apparatus (81) for measuring performance of a network device comprising:

a processor (81a);

a clock (81b) coupled to the processor (81a) and outputting a clock signal, said processor (81a);

inserting a first time stamp upon receipt of a packet; and

inserting a second time stamp upon transmitting the packet.

16. The apparatus (81) according to claim 15, wherein said processor (81a) during packet transmission inspects each packet for presence of a field in a packet header, which field indicates timestamps should be added, upon which positive determination only said processor inserts the second time stamp.

17. A network device (10) to manage multiple synchronization input references comprising:

a building integrated timing supply providing a first clock source;

a network interface providing a second clock source;

an input reference module (11) receiving a plurality of clock signals from the first and second clock sources, said input reference module (11) outputting a primary reference signal and a secondary reference signal from among the plurality of clock signals;

a stratum three module (12) coupled to the input reference module (11) and receiving the primary reference signal and the secondary reference signal from the input reference module, generating two output reference clocks signals, a first of which is clocked at a rate acceptable to a first network module type and a second of which is clocked at a rate acceptable to a second network module type; and

a clock distribution module (13) coupled to the input reference module (81a;

11) and to be coupled to a first network module type and to a second network module type and generating a plurality of versions of the first output reference clock signal and generating a plurality of versions of the secondary output reference clock signal.

18. The network device according to claim 17, wherein the input reference module includes:

a clock receiver (11a) receiving the second clock signal;

a first multiplexer (11b) coupled to the clock receiver (11a) and receiving the first and second clock signals and generating the primary reference signal;

a second multiplexer (11c) coupled to the clock receiver (11a) and receiving the first and second clock signals and generating the second reference signal.

19. The network device according to claim 17, wherein the clock distribution module (13) includes:

a first clock repeater receiving the primary reference signal and generating the plurality of versions of the primary reference signal;

a second clock repeater receiving the secondary reference signal and generating the plurality of versions of the secondary reference signal; and

a clock enable input via which a number of versions to be generated can be specified.

20. The network device according to claim 17, further comprising a processor:

receiving one of either the primary reference signal and the secondary reference signal;

inserting a first time stamp in a received network packet upon receipt of the received network packet, which said first time stamp is generated from said one of either the primary reference signal and the secondary reference signal; and

inserting a second time stamp in a forwarded packet generated from the received packet, which forwarded packet is to be transmitted to a next network device in the network, just prior to transmission of the forwarded packet, which second time stamp is generated from said either one of the primary reference signal and the secondary reference signal.