Method for fabricating a capacitor using a metal insulator metal structure

• US 20040147085A1
• Filed: 12/22/2003
• Published: 07/29/2004
• Est. Priority Date: 12/24/2002
• Status: Active Grant

• Current Assignee: DONGBU ELECTRONICS CO., LTD. (DB HiTek Co., Ltd.)
• Original Assignee: DONGBU ELECTRONICS CO., LTD. (DB HiTek Co., Ltd.)
• Inventors: Jo, Bo-Yeoun
• Granted Patent: US 7,247,572 B2
• Time in Patent Office: Days
• US Class Current: 438/381
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/3185 of siliconnitrides
• CPC Class Codes: H01L 21/32136 using plasmas
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 28/75 comprising two or more layers, e.g. comprising a barrier layer and a metal layer

Abstract

A method for fabricating a capacitor using a metal/insulator/metal (MIM) structure is disclosed. An example method for fabricating a capacitor using an MIM structure including a first metal layer, a dielectric layer, and a second metal layer etches the second metal layer and the dielectric layer in order and changes the etching conditions associated with the second metal layer prior to etching the dielectric layer.

Claims

1. A method for fabricating a capacitor in a metal/insulator/metal structure including a first metal layer, a dielectric layer, and a second metal layer, the method comprising:

etching the second metal layer and the dielectric layer in order; and

changing the etching conditions associated with the second metal layer prior to etching the dielectric layer.

2. The method of claim 1, wherein etching the second metal layer and the dielectric layer comprises using a reactive ion etching process.

3. The method of claim 1, wherein the dielectric layer remains following the etching of the dielectric layer.

4. The method of claim 3, wherein a surface of the remaining dielectric layer is even.

5. The method of claim 1, wherein, etching the second metal layer includes etching using a mixture gas consisting of Cl₂, CHF₃ and Ar, and wherein etching the dielectric layer includes etching using a mixture gas consisting of Cl₂ and Ar.

6. The method of claim 1, wherein the second metal layer includes Ti and TiN stacked in order.

7. The method of claim 6, wherein a thickness of the Ti is 300 to 700 Å

and a thickness of the TiN is 1300 to 1700 Å

.

8. The method of claim 1, wherein a total thickness of the second metal layer is 1600 to 2400 Å

.

9. The method of claim 1, wherein the dielectric layer is made of nitride.

10. The method of claim 1, wherein a thickness of the dielectric layer is 400 to 800 Å

.

11. The method of claim 1, wherein the first metal layer comprises a first Ti/TiN stacking structure, an AlCu layer and a second Ti/TiN stacking structure, which are formed in order.

12. The method of claim 1, wherein etching the second metal layer comprises using a mixture gas consisting of Cl₂, CHF₃ and Ar in the ratio of 5:

1;

5.

13. The method of claim 1, wherein, etching the second metal layer comprises etching the second metal layer for 45 to 55 seconds

14. The method of claim 1, wherein etching the second metal layer comprises generating a plasma at a pressure of 8 mTorr and a power of 900W and applying a bias power of more than 150W.

15. The method of claim 1, wherein etching the dielectric layer comprises using a mixture gas consisting of Cl₂ and Ar in the ratio of 1 to 2.

16. The method of claim 1, wherein an etching time associated with the dielectric layer is between about 10 to 15% of an etching time associated with the second metal layer

17. The method of claim 1, wherein etching the dielectric layer comprises etching the dielectric layer for 4.5 to 8 seconds.

18. The method of claim 1, wherein etching the dielectric layer comprises generating a plasma is generated under a pressure of 8 mTorr and an application power of 900W and applying a bias power of more than 150W.

19. The method of claim 1, wherein, before the second metal layer is etched, a photoresist pattern is formed on the second metal layer, and the second metal layer and the dielectric layer are etched using the photoresist pattern as a mask.

20. The method of claim 1, wherein a thickness of the photoresist pattern is 11,000 to 15,000 Å

.