Capacitor

• US 20040147088A1
• Filed: 01/16/2004
• Published: 07/29/2004
• Est. Priority Date: 09/12/2001
• Status: Active Grant

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Hong, Kwon
• Granted Patent: US 7,042,034 B2
• Time in Patent Office: Days
• US Class Current: 438/396
• CPC Class Codes: H01L 28/55 with a dielectric comprising a perovskite structure material
• CPC Class Codes: H01L 28/60 Electrodes
• CPC Class Codes: H01L 28/90 having vertical extensions

Abstract

The disclosure provides a capacitor including a lower electrode, a surface of which can be formed of Pt, and an inner part of which can be formed of metal having good antioxidant properties. The inner part of the lower electrode can be formed by depositing Ru or Ir with an electro plating process. It is possible to improve the leakage current characteristics by forming the surface of the lower electrode with Pt. Also it is possible to perform a thermal treatment at a high temperature in an oxygen atmosphere, because the inner part of the lower electrode resists or prevents diffusion of oxygen, so that a high dielectric layer can be obtained.

Claims

1. A method for forming a capacitor, comprising the steps of:

forming a lower electrode including a metal pattern and a layer comprising Pt covering an upper surface and sidewalls of the metal pattern on a substrate, wherein the metal pattern is formed of a material capable of forming a conductive oxide;

forming a dielectric layer on the lower electrode; and

forming an upper electrode on the dielectric layer.

2. The method as recited in claim 1, wherein the step of forming the lower electrode includes the steps of:

forming a sacrificial layer on the substrate;

forming a contact hole by selectively etching the sacrificial layer;

forming a seed layer comprising Pt in the contact hole;

filling the contact hole with a metal layer for the metal pattern;

removing the sacrificial layer, whereby the metal pattern is exposed; and

forming the layer comprising Pt on the upper surface and sidewalls of the metal pattern.

3. The method as recited in claim 2, comprising forming the metal layer with an electro plating process.

4. The method as recited in claim 2, wherein the step of forming the layer comprising Pt includes the steps of:

forming the layer comprising Pt on the metal pattern with a sputtering method; and

performing a blanket etch back process with a reactive ion etching process, whereby the layer comprising Pt remains on the upper surface and sidewalls of the metal pattern.

5. The method as recited in claim 2, comprising forming the seed layer to a thickness of about 100 Å

to about 300 Å

.

6. The method as recited in claim 2, comprising forming the seed layer with a chemical vapor deposition method.

7. The method as recited in claim 2, comprising forming the metal pattern comprising a metal selected from the group consisting of Ru and Ir.

8. A capacitor comprising:

a lower electrode formed on a substrate, wherein the lower electrode includes a metal pattern and a layer comprising Pt covering an upper surface and sidewalls of the metal pattern, and wherein the metal pattern is formed of a material capable of forming a conductive oxide;

a dielectric layer formed on the lower electrode; and

an upper electrode formed on the dielectric layer.

9. The capacitor as recited in claim 8, further comprising a seed layer comprising Pt between the substrate and the metal pattern.

10. The capacitor as recited in claim 9, wherein the metal pattern is formed comprising a metal selected from the group consisting of Ru and Ir.