Nanoelectronic devices and circuits
First Claim
1. An electronic circuit component comprising a substrate supporting mobile charge carriers, insulative features formed on the substrate surface to define first and second substrate areas on either side of the insulative features, the insulative features including first and second regions which are positioned close to one another but spaced apart so as to provide an elongate channel, which provides a charge carrier flow path in the substrate from the first area to the second area, and wherein said elongate channel is dimensioned and arranged such that the parameters of the charge carrier flow path are dependent on a potential difference between said first and second areas.
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Accused Products
Abstract
Diode devices with superior and pre-settable characteristics and of nanometric dimensions, comprise etched insulative lines (8, 16, 18) in a conductive substrate to define between the lines charge carrier flow paths, formed as elongate channels (20) at least 100 nm long and less than 100 nm wide. The current-voltage characteristic of the diode devices are similar to a conventional diode, but both the threshold voltage (from 0V to a few volts) and the current level (from nA to μA) can be tuned by orders of magnitude by changing the device geometry. Standard silicon wafers can be used as substrates. A full family of logic gates, such as OR, AND, and NOT, can be constructed based on this device solely by simply etching insulative lines in the substrate.
19 Citations
16 Claims
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1. An electronic circuit component comprising a substrate supporting mobile charge carriers, insulative features formed on the substrate surface to define first and second substrate areas on either side of the insulative features, the insulative features including first and second regions which are positioned close to one another but spaced apart so as to provide an elongate channel, which provides a charge carrier flow path in the substrate from the first area to the second area, and
wherein said elongate channel is dimensioned and arranged such that the parameters of the charge carrier flow path are dependent on a potential difference between said first and second areas.
Specification