ERROR CORRECTION CODE CIRCUIT WITH REDUCED HARDWARE COMPLEXITY

• US 20040153722A1
• Filed: 12/25/2002
• Published: 08/05/2004
• Est. Priority Date: 12/25/2002
• Status: Active Grant

• Current Assignee: Novatek Microelectronics Corporation (Novatek Microelectronics Corp Limited)
• Original Assignee: Faraday Technology Corp.
• Inventors: Lee, Heng-Kuan
• Granted Patent: US 7,028,247 B2
• Time in Patent Office: Days
• US Class Current: 714/6
• CPC Class Codes: G06F 7/724 Finite field arithmetic for error detection or correction in general H03M13/00, in computers G06F11/10
• CPC Class Codes: H03M 13/158 Finite field arithmetic processing

Abstract

An error correction code circuit with reduced hardware complexity is positioned inside a microprocessor. The microprocessor has a Galois field multiplier for performing a Galois field multiplication on data processed by the error correction code circuit. The error correction code circuit has a first register for storing an input data, a plurality of calculation units, a third register for storing an output data corresponding to the input data, and a controller for controlling operation of the error correction code circuit. Each calculation unit has a Galois field adder, and a second register electrically connected to the Galois field adder. The controller transmits data of each calculation unit to the same Galois field multiplier for a corresponding Galois field multiplication, and the result outputted by the Galois field multiplier is transmitted back to the error correction code circuit.

Claims