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Hardware driven state save/restore in a data processing system

  • US 20040153762A1
  • Filed: 10/24/2003
  • Published: 08/05/2004
  • Est. Priority Date: 11/13/2002
  • Status: Abandoned Application
First Claim
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1. Apparatus for processing data, said apparatus comprising:

  • a circuit used in processing data, said circuit having one or more nodes operable to store one or more data values that together define a state of said circuit;

    a memory operable to store data;

    a system bus coupled to said circuit and said memory and operable to transfer multi-bit data words between said circuit and said memory in response to memory transfer requests issued upon said system bus during normal processing operation of said circuit and said memory; and

    a state saving controller coupled to said circuit and said system bus and operable in response to a state saving trigger to read said data values defining a state of said circuit from said one or more nodes and to generate a sequence of memory write requests on said system bus that write one or more state saving multi-bit data words representing said data values into said memory such that said state of said circuit is restorable using said one or more state saving multi-bit data words.

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