Semiconductor device and method of manufacturing the same

• US 20040157354A1
• Filed: 12/11/2003
• Published: 08/12/2004
• Est. Priority Date: 12/13/2002
• Status: Active Grant

• Current Assignee: Canon Ayutthaya Limited (Canon Inc.)
• Original Assignee: Canon Ayutthaya Limited (Canon Inc.)
• Inventors: Fukutani, Kazuhiko, Ogawa, Miki, Den, Tohru, Miyata, Hirokatsu, Kuriyama, Akira, Otto, Albrecht, Okura, Hiroshi
• Granted Patent: US 7,183,127 B2
• Time in Patent Office: Days
• US Class Current: 438/45
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: G02B 6/1225 comprising photonic band-gap structures or photonic lattices
• CPC Class Codes: H01L 27/146 Imager structures
• CPC Class Codes: H01L 27/148 Charge coupled imagers individual charge coupled devices H01L29/765
• CPC Class Codes: H01L 27/153 in a repetitive configuration, e.g. LED bars
• CPC Class Codes: H01L 31/035281 Shape of the body
• CPC Class Codes: H01L 31/103 the potential barrier being of the PN homojunction type
• CPC Class Codes: H01L 31/105 the potential barrier being of the PIN type
• CPC Class Codes: H01L 33/08 with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body H01L27/15 takes precedence
• CPC Class Codes: H01L 33/18 within the light emitting region
• CPC Class Codes: Y02E 10/50 Photovoltaic [PV] energy

Abstract

A semiconductor device array comprising highly densely arranged nano-size semiconductor devices is prepared by a simple method. The array comprises a porous body having cylinder-shaped pores formed by removing cylinder-shaped regions from a structure that includes a matrix member formed so as to contain silicon or germanium and the cylinder-shaped regions containing aluminum and dispersed in the matrix member, semiconductor regions formed in the pores, each having at least a p-n or p-i-n junction, and a pair or electrodes, arranged respectively on the top and at the bottom of the semiconductor regions. The semiconductor regions and the pair of electrodes form a plurality of semiconductor devices on a substrate.

Claims

1. A method of manufacturing a semiconductor device comprising:

a step of preparing a structure including a plurality of cylinder-shaped members and a region surrounding the cylinder-shaped members;

a step of forming a porous body having cylinder-shaped pores by removing the cylinder-shaped members from the structure; and

a step of introducing a material into the pores of the porous body and forming p-n or p-i-n junctions.

2. A method according to claim 1, wherein said cylinder-shaped members formed so as to contain a first material are surrounded by said region formed so as to contain a second material in said structure and the structure contains the second material at a ratio of not smaller than 20 atomic % and not greater than 70 atomic % relative to the total quantity of the first and second materials.

3. A semiconductor device obtained by forming p-n or p-i-n junctions in a porous body formed by removing cylinder-shaped members from a structure including the cylinder-shaped members and a region surrounding the cylinder-shaped members.

4. A device according to claim 3, wherein said cylinder-shaped members formed so as to contain a first material are surrounded by said region formed so as to contain a second material in said structure and the structure contains the second material to a ratio of not smaller than 20 atomic % and not greater than 70 atomic % relative to the total quantity of the first and second materials.

5. A semiconductor device array formed by arranging a plurality of semiconductor devices on a substrate, said device array comprising:

a porous body having cylinder-shaped pores and formed by removing cylinder-shaped regions from a structure including a matrix member comprising a second ingredient capable of forming a eutectic crystal with a first ingredient and the cylinder-shaped regions comprising the first ingredient and dispersed in the matrix member;

semiconductor regions formed in the pores, each of the semiconductor regions having at least a p-n junction or a p-i-n junction; and

a pair of electrodes arranged as sandwiching the semiconductor regions.

7. A device array according to claim 5, wherein said semiconductor devices are diodes.

8. A device array according to claim 5, wherein said semiconductor devices are transistors.

9. A device array according to claim 5, wherein the ratio of the second ingredient of the matrix member of said porous body relative to said structure is not smaller than 20 atomic % and not greater than 70 atomic %.

10. A device array according to claim 5, wherein the first ingredient of said cylinder-shaped regions is aluminum and the second ingredient of said matrix member is silicon.

11. A device array according to claim 9, wherein the first ingredient of said cylinder-shaped regions is aluminum and the second ingredient of said matrix member is germanium.

12. A device array according to claim 5, wherein the principal ingredient of said porous body is silicon.

13. A device array according to claim 5, wherein the principal ingredient of said porous body is germanium.

14. A device array according to claim 5, wherein said cylinder-shaped regions are made of a crystalline material and said matrix member is made of an amorphous material.

6. A semiconductor device array formed by arranging a plurality of semiconductor devices on a substrate, said device array comprising:

semiconductor regions formed by filling a semiconductor material into cylinder-shaped pores of a porous body, the porous body being formed by removing cylinder-shaped regions from a structure including a matrix member comprising a second ingredient capable of forming a eutectic crystal with a first ingredient and the cylinder-shaped regions comprising the first ingredient and dispersed in the matrix member, and subsequently removing the matrix member, each of the semiconductor regions having at least a p-n junction or a p-i-n junction; and

a pair of electrodes arranged as sandwiching the semiconductor regions.

15. A method of manufacturing a semiconductor device array comprising:

(a) a step of arranging an electrode on a substrate;

(b) a step of forming a structure including a matrix member containing a second ingredient capable of forming a eutectic crystal with a first ingredient and cylinder-shaped regions containing the first ingredient and dispersed in the matrix member on said substrate;

(c) a step of removing said cylinder-shaped regions;

(d) a step of forming semiconductor regions, each having at least a p-n junction or a p-i-n junction, in the cylinder-shaped pores obtained as a result of the above removing step;

(e) a step of forming another electrode on the top of said structure in which said semiconductor regions are formed.

16. A method according to claim 15, wherein etching is used for said removing step.

17. A method according to claim 15, further comprising a step of chemically treating the matrix member containing said second ingredient after the step of removing said cylinder-shaped regions.

18. A method according to claim 17, wherein said chemical treatment is oxidation.

19. A method according to claim 15, further comprising a step of increasing the pore diameter of the cylinder-shaped pores after the step of removing said cylinder-shaped regions.

20. A method according to claim 15, further comprising a step of removing said matrix member surrounding said cylinder-shaped regions after the step of forming another electrode on the top of said structure.

21. A method according to claim 15, wherein a chemical vapor deposition method is used for said step of forming semiconductor regions.

22. A method according to claim 15, wherein said step of forming semiconductor regions is performed by means of a catalytic reaction after forming a catalyst at the bottoms of said pores.