Low power processor
First Claim
1. A microprocessor comprising:
- a main circuit including transistors;
a substrate bias switching circuit for switching voltages of substrate biases applied to a substrate of said main circuit; and
an operation mode control circuit for controlling, in response to execution of an instruction to proceed to a first mode in said main circuit, said substrate bias switching circuit in such a way that the substrate biases are switched over to voltages for the first mode, and for controlling, in response to execution of an instruction to proceed to a second mode in said main circuit, said substrate bias switching circuit in such a way that the substrate biases are switched over to voltages for the second mode, and also for starting, when switching the substrate biases from the voltages for the first mode over to the voltages for the second mode, the operation of said transistors of said main circuit after the bias voltages switched thereto have been stabilized.
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Accused Products
Abstract
The feature of the present invention consists in: a processor main circuit for executing program instruction strings on a processor chip; a substrate bias switching unit for switching voltages of substrate biases applied to a substrate of the processor main circuit; and an operation mode control unit for controlling, in response to the execution of an instruction to proceed to a stand-by mode in the processor main circuit, the substrate bias switching unit in such a way that the biases are switched over to voltages for the stand-by mode, and for controlling, in response to an interruption of the stand-by release from the outside, the substrate bias switching unit in such a way that the biases are switched over to voltages for a normal mode, and also for releasing, after the bias voltages switched thereto have been stabilized, the stand-by of the processor main circuit to restart the operation.
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Citations
47 Claims
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1. A microprocessor comprising:
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a main circuit including transistors;
a substrate bias switching circuit for switching voltages of substrate biases applied to a substrate of said main circuit; and
an operation mode control circuit for controlling, in response to execution of an instruction to proceed to a first mode in said main circuit, said substrate bias switching circuit in such a way that the substrate biases are switched over to voltages for the first mode, and for controlling, in response to execution of an instruction to proceed to a second mode in said main circuit, said substrate bias switching circuit in such a way that the substrate biases are switched over to voltages for the second mode, and also for starting, when switching the substrate biases from the voltages for the first mode over to the voltages for the second mode, the operation of said transistors of said main circuit after the bias voltages switched thereto have been stabilized. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A microprocessor comprising:
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a processor main circuit for executing program instruction strings;
a substrate bias control circuit for controlling substrate biases applied to a substrate on which said processor main circuit is formed; and
an operation mode control unit for controlling said substrate bias control circuit in such a way that said processor main circuit is controlled so as to obtain voltages for a stand-by mode, and for controlling, in response to an interruption for the stand-by release from the outside, said substrate bias control circuit in such a way that the voltages for the stand-by mode are switched over to voltages for a normal mode, wherein said operation mode control unit releases the stand-by of said main circuit after the voltages for the normal mode have been stabilized.
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16. A semiconductor integrated circuit device having a first circuit block including transistors and a second circuit block for exchanging signals between said first circuit block and said second circuit block, said device comprising:
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a substrate bias generating circuit for applying substrate bias voltages to a semiconductor substrate on which the transistors of said first circuit block are formed; and
output fixing circuits for fixing, when said substrate bias generating circuit changes the substrate bias voltages, levels of at least part of the signals which are inputted from said second circuit block to said first circuit block. - View Dependent Claims (17, 18, 19, 20)
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21. A semiconductor integrated circuit device having a first circuit block including transistors and a second circuit block for exchanging signals between said first circuit block and said second circuit block, said device comprising:
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a substrate bias generating circuit for applying substrate bias voltages to a semiconductor substrate on which the transistors of said first circuit block are formed; and
a clock oscillation circuit for stopping a clock signal inputted to said first circuit block, when said substrate bias generating circuit changes the substrate bias voltages. - View Dependent Claims (22, 23, 24, 25)
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26. A semiconductor integrated circuit device comprising:
- a first circuit block including a logical circuit having MOS FETs, and driven by a first voltage; and
a second circuit block including an I/O circuit, a level holding circuit and a bias generating circuit, and driven by a second voltage,wherein said bias generating circuit switches voltages applied to said main circuit in such a way that thresholds of the MOS FETs become high;
an output signal from said I/O circuit is inputted to said main circuit through an output fixing circuit; and
when switching the voltages by said bias generating circuit, said output fixing circuit fixes the output signal. - View Dependent Claims (27, 28, 29, 30, 31, 32, 33)
- a first circuit block including a logical circuit having MOS FETs, and driven by a first voltage; and
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34. A processor comprising:
- a processor main circuit for executing program instruction strings on a processor chip;
a substrate bias switching unit for switching voltages of substrate biases applied to a substrate of said processor main circuit; and
an operation mode control unit for controlling, in response to the execution of an instruction to proceed to a stand-by mode in said processor main circuit, said substrate bias switching unit in such a way that the biases are switched over to voltages for the stand-by mode, and for controlling, in response to an interruption of the stand-by release from the outside, said substrate bias switching unit in such a way that the biases are switched over to voltages for a normal mode, and also for releasing, after the bias voltages switched thereto have been stabilized, the stand-by of said processor main circuit to restart the operation. - View Dependent Claims (35, 36, 37, 38, 39, 40)
- a processor main circuit for executing program instruction strings on a processor chip;
- 41. A control method of controlling the power consumption of a semiconductor integrated circuit device including a plurality of element circuit blocks having transistors formed on a semiconductor substrate and operated on the basis of a clock signal, wherein a first mode in which all said element circuit blocks are operated on the basis of the clock-signal, a second mode in which the supply of the clock signal to at least one of said element circuit blocks is stopped, and a third mode in which the supply of the clock signal to all said element circuit blocks is stopped and also substrate biases of at least part of the transistors formed on the semiconductor substrate are controlled so as to increase thresholds of the associated transistors are switched to be used.
Specification