Power scalable digital video decoding

• US 20040158878A1
• Filed: 02/07/2003
• Published: 08/12/2004
• Est. Priority Date: 02/07/2003
• Status: Abandoned Application

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Bhaskaran, Vasudev, Chen, William, Kim, Changick, Guleryuz, Onur G., Ratnakar, Viresh
• Application Number:
  US10/360,977
• Publication Number:
  US 20040158878A1
• Time in Patent Office: Days
• US Class Current: 725/150
• CPC Class Codes: H04N 19/103 Selection of coding mode or of prediction mode
• CPC Class Codes: H04N 19/117 Filters, e.g. for pre-processing or post-processing sub-band filter banks H04N19/635
• CPC Class Codes: H04N 19/122 Selection of transform size, e.g. 8x8 or 2x4x8 DCT; Selection of sub-band transforms of varying structure or type
• CPC Class Codes: H04N 19/132 Sampling, masking or truncation of coding units, e.g. adaptive resampling, frame skipping, frame interpolation or high-frequency transform coefficient masking
• CPC Class Codes: H04N 19/156 Availability of hardware or computational resources, e.g. encoding based on power-saving criteria
• CPC Class Codes: H04N 19/162 User input
• CPC Class Codes: H04N 19/172 the region being a picture, frame or field
• CPC Class Codes: H04N 19/176 the region being a block, e.g. a macroblock
• CPC Class Codes: H04N 19/186 the unit being a colour or a chrominance component
• CPC Class Codes: H04N 19/42 characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation H04N19/635 takes precedence
• CPC Class Codes: H04N 19/44 Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
• CPC Class Codes: H04N 19/587 involving temporal sub-sampling or interpolation, e.g. decimation or subsequent interpolation of pictures in a video sequence
• CPC Class Codes: H04N 19/59 involving spatial sub-sampling or interpolation, e.g. alteration of picture size or resolution
• CPC Class Codes: H04N 19/61 in combination with predictive coding
• CPC Class Codes: H04N 19/86 involving reduction of coding artifacts, e.g. of blockiness
• CPC Class Codes: H04N 19/895 in combination with error concealment
• CPC Class Codes: H04N 21/41407 embedded in a portable device, e.g. video client on a mobile phone, PDA, laptop constructional details of equipment or arrangements specially adapted for portable computer application G06F1/1626; arrangements specially adapted for mobile receivers in broadcast systems H04H20/57
• CPC Class Codes: H04N 21/431 Generation of visual interfaces for content selection or interaction; Content or additional data rendering
• CPC Class Codes: H04N 21/4402 involving reformatting operations of video signals for household redistribution, storage or real-time display details of conversion of video standards at pixel level H04N7/01; video transcoding H04N19/40; adapting incoming signals to the display format of the display terminal G09G5/005; media handling at the source in data packet switching networks H04L65/764
• CPC Class Codes: H04N 21/4424 Monitoring of the internal components or processes of the client device, e.g. CPU or memory load, processing speed, timer, counter or percentage of the hard disk space used error monitoring in general G06F11/30; arrangements for monitoring conditions of receiving stations in broadcast systems H04H60/32; diagnosis, testing or measuring for television receivers H04N17/04
• CPC Class Codes: H04N 21/4432 : Powering on the client, e.g. bootstrap loading using setup parameters being stored locally or received from the server resetting in general G06F1/14; program loading or initiating in general G06F9/445; bootstrapping in general G06F9/4401; secure boots of computer platforms G06F21/57
• CPC Class Codes: H04N 21/4621 : Controlling the complexity of the content stream or additional data, e.g. lowering the resolution or bit-rate of the video stream for a mobile client with a small screen arrangements for using the results of monitoring on user's side in broadcast systems H04H60/65; flow control in packet networks H04L47/10
• CPC Class Codes: H04N 5/63 : Generation or supply of power specially adapted for television receivers

Abstract

A method for decoding digital video data in a power scalable manner is provided. The method initiates with monitoring a power level available for the video decoding system. Then, threshold power levels are identified. In response to the power level available crossing one of the threshold power levels, the method includes changing both a power consumption level associated with the video decoding system and a video presentation quality. A method for determining optimum pairings of power consumption and video quality for a video decoding system is also provided. In addition, a power scalable video device, an integrated circuit chip for a video decoding system and a graphical user interface are provided.

Claims

1. A method for determining an optimum pairing of power consumption and video quality for a video decoder, comprising:

defining a target platform;

identifying a plurality of video decoding profiles;

measuring performance of each of the plurality of video decoding profiles with a plurality of video streams; and

identifying a portion of the plurality of video decoding profiles wherein each of the portion of the plurality of video decoding profiles is associated with a different power level.

3. The method of claim 1, wherein the plurality of video decoding profiles include alternatives associated with modules, the modules selected from the group consisting of frame memory compression, color conversion, frame display skipping, frame scaling, chroma skipping, inverse discrete cosine transform, deblocking and deringing, error concealment and extended error detection.

4. The method of claim 1, wherein the target platform is defined by a processor, a display and a memory associated with the video decoder.

5. The method of claim 3, wherein the alternatives are power related alternatives for providing differing display quality levels through functionality associated with each of the modules.

6. The method of claim 1, wherein the method operation of measuring performance of each of the plurality of video decoding profiles with a plurality of video streams includes,

defining points on an upper envelope of a plot of video quality versus power consumption, each of the points corresponding to a single performance measurement of one of the plurality of video decoding profiles applied to one of the plurality of video streams.

7. The method of claim 1, wherein the method operation of measuring performance of each of the plurality of video decoding profiles with a plurality of video streams includes,

quantifying power consumed for decoding each of the plurality of video streams according to each of the plurality of video decoding profiles;

and

identifying video quality for decoding each of the plurality of video streams according to each of the plurality of video decoding profiles.

2. The method of FIG. 1, further comprising:

implementing the portion of the plurality of video decoding profiles into a video decoder.

8. A method for decoding image data in a power scalable manner, comprising:

monitoring a power level available for a video decoding system;

identifying threshold power levels; and

in response to the power level available crossing one of the threshold power levels, the method includes,

changing both a power consumption level associated with the video decoding system and a video presentation quality.

9. The method of claim 8, wherein the method operation of monitoring a power level available for a video decoding system includes,

accessing a register having data associated with the power level.

10. The method of claim 8, wherein the threshold power levels are predefined.

11. The method of claim 8, wherein the method operation of changing both a power consumption level associated with the video decoding system and a video presentation quality includes,

determining whether the power level available is decreasing or increasing.

12. The method of claim 11, wherein if the power level available is decreasing, the method includes,

reducing both the power consumption level and the video presentation quality.

13. The method of claim 8, wherein the method operation of changing both a power consumption level associated with the video decoding system and a video presentation quality includes,

adjusting one of an instruction count and a memory access count associated with the video decoding system.

14. A computer program product having program instructions for decoding image data in a power scalable manner, comprising:

program instructions for identifying threshold power levels;

program instructions for monitoring a power level available for a video decoding system;

program instructions for determining when the power level available for the decoding system crosses one of the threshold power levels; and

program instructions for changing both a power consumption level associated with the video decoding system and a video presentation quality, wherein the program instructions for changing are triggered by the power level available crossing one of the threshold power levels.

15. The computer program product of claim 14, wherein the program instructions for monitoring a power level available for a video decoding system, include

program instructions for accessing a register having data associated with the power level.

16. The computer program product of claim 14, wherein the method operation of changing both a power consumption level associated with the video decoding system and a video presentation quality includes,

program instructions for determining whether the power level available is decreasing or increasing.

17. The computer program product of claim 16, wherein if the power level available is decreasing, the method includes,

program instructions for selecting a video decoding profile configured to reduce both the power consumption level and the video presentation quality.

18. A power scalable video decoding device, comprising:

a processor configured to monitor an available power level for the video decoding system in order to select a decoding state for decoding image data, wherein the processor is enabled to adjust the decoding state based upon changes detected to the available power level;

a memory configured to store compressed data and decoded frames associated with the compressed image data;

a display screen configured to present the decoded frames; and

a bus enabling communication between the processor, the memory and the display screen.

19. The power scalable video decoding device of claim 18, wherein the device is selected form the group consisting of a cellular phone, a personal digital assistant, a pocket personal computer, a web tablet and a laptop computer.

20. The power scalable video decoding device of claim 18, wherein the processor is a liquid crystal display (LCD) controller and the display screen is an LCD display screen.

21. The power scalable video decoding device of claim 18, wherein the decoding state includes a combination of alternatives, each one of the alternatives being associated with one of a plurality of modules.

22. The power scalable video decoding device of claim 21, wherein the plurality of modules are selected from the group consisting of frame memory compression, color conversion, frame display skipping, frame scaling, chroma skipping, inverse discrete cosine transform, deblocking and deringing, error concealment and extended error detection.

23. The power scalable video decoding device of claim 21, wherein each one of the alternatives is associated with a different power consumption level.

24. The power scalable video decoding device of claim 18, wherein the processor is one of a digital signal processor (DSP) and an application specific integrated circuit.

25. An integrated circuit chip associated with a video decoding system, comprising:

circuitry for monitoring a power level available to the video decoding system;

circuitry for selecting a video decoding state associated with a first quality level, the video decoding state based upon the power level available;

circuitry for determining when the power level available changes and crosses a threshold power level, thereby causing the circuitry for selecting the video decoding state to select a modified video decoding state associated with a second quality level; and

circuitry for decoding image data according to a selected video decoding state.

26. The integrated circuit chip of claim 25, wherein the video decoding state includes a combination of power consumption alternatives, each one of the power consumption alternatives associated with one video decoding module.

27. The integrated circuit chip of claim 25, wherein the video decoding state and the modified video decoding state differ by at least one power consumption alternative, the at least one power consumption alternative modifying one of an instruction count and a memory access count associated with decoding the image data in order to adjust a power consumption level.

28. The integrated circuit chip of claim 25, wherein as the power level available decreases and crosses a threshold power level, a displayed image associated with the second quality level is of a lower presentation quality than a displayed image associated with the first quality level.

29. A graphical user interface (GUI) rendered by a computing device, comprising:

a user interface for selecting a power consumption mode associated with a video decoder, the user interface including computer code for triggering the selection of the power mode, wherein the user interface allows a user to choose between a plurality of decoding states.

30. The GUI of claim 29, wherein the power consumption mode is selected from a range of power consumption modes provided by a drop down menu.

31. The GUI of claim 29, wherein each power consumption mode from the range of power consumption modes is associated with one of the plurality of decoding states.

32. A method for storing image data for video decoding, comprising:

receiving compressed image data;

decoding the compressed image data into decompressed image data;

identifying luminance and chrominance data corresponding to a frame of image data; and

storing the luminance and chrominance data for the frame of image data contiguously.

33. The method of claim 32, further comprising:

re-compressing the identified luminance and chrominance data for the frame of image data.

34. The method of claim 33, wherein the method operation of re-compressing the identified luminance and chrominance data for the frame of image data includes,

utilizing a differential pulse code modulation compression technique for re-compressing the identified luminance and chrominance data.

35. The method of claim 33, wherein a lossless compression technique is used to re-compress the identified luminance and chrominance data.