Error amplifier and DC-DC converter and the method thereof
First Claim
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1. An error amplifier, comprising:
- a soft start signal;
an input signal;
a reference voltage;
an output signal converging to a steady state voltage;
a first amplification stage for amplifying the difference between the reference voltage and the input signal;
a clamp stage for clamping the output signal to the soft start signal when the soft start signal is smaller than the steady state voltage;
a buffer stage for driving the output signal; and
a second amplification stage including a first transistor controlled by the first amplification stage and a second transistor controlled by the clamp stage, wherein the outputs of the first transistor and second transistor are electrically connected to the buffer stage.
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Abstract
The DC-DC converter of the present invention sets the soft start function in the error amplifier. With soft start added, the error amplifier'"'"'s output voltage will follow the slowly ascending soft start voltage when the DC-DC converter is enabled. Then the soft start looses control over the error amplifier when the soft start voltage exceeds the steady state value of the error amplifier'"'"'s output voltage. And meanwhile, the amplifier'"'"'s input will take over the control. By doing so, the present invention significantly eradicates or reduces jitters caused by the output voltage of the error amplifier and the DC-DC converter.
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Citations
12 Claims
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1. An error amplifier, comprising:
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a soft start signal;
an input signal;
a reference voltage;
an output signal converging to a steady state voltage;
a first amplification stage for amplifying the difference between the reference voltage and the input signal;
a clamp stage for clamping the output signal to the soft start signal when the soft start signal is smaller than the steady state voltage;
a buffer stage for driving the output signal; and
a second amplification stage including a first transistor controlled by the first amplification stage and a second transistor controlled by the clamp stage, wherein the outputs of the first transistor and second transistor are electrically connected to the buffer stage. - View Dependent Claims (2, 3, 4)
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5. An error amplifier, comprising:
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a soft start signal exhibiting a slowly ascending characteristic when the error amplifier is enabled;
an output signal converging to a steady state voltage;
an input signal;
a reference voltage;
a clamp stage for clamping the output signal to the soft start signal when the soft start signal is smaller than the steady state voltage; and
an error amplification module for amplifying the difference between the reference voltage and the input signal when the soft start signal is larger than the steady state voltage. - View Dependent Claims (6, 7, 8, 9, 10, 11)
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12. A DC-DC converting method, comprising the steps of:
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providing a soft start signal and a reference voltage connected to an error amplifier, wherein the soft start signal ascends gradually when the error amplifier is enabled and the output of the error amplifier converges to a steady state voltage;
clamping the output of the error amplifier to the soft start signal when the soft start signal is smaller than the steady state voltage; and
amplifying the difference between the reference voltage and the input of the error amplifier when the soft start signal is larger than the steady state voltage.
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Specification