Cable modem system with sample and packet synchronization

• US 20040163120A1
• Filed: 02/17/2004
• Published: 08/19/2004
• Est. Priority Date: 02/12/1999
• Status: Active Grant

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Denney, Lisa V., Chen, Feng, Min, Jonathan S., Jones, Christopher R., Samueli, Henry, Nazareth, Sean F., Lu, Fang, Quigley, Thomas J., Horton, John D. Jr., Rabenko, Theodore F., Thi, James C. H.
• Granted Patent: US 7,190,704 B2
• Time in Patent Office: Days
• US Class Current: 725/111
• CPC Class Codes: H04J 3/0655 using timestamps
• CPC Class Codes: H04L 1/0003 by switching between different modulation schemes
• CPC Class Codes: H04L 12/2801 Broadband local area networks

Abstract

A method for communicating information is disclosed wherein a time slot is allocated in a time division multiple access system for a transmission from a subscriber to a headend. Synchronization of a clock of the subscriber with respect to a clock of the headend is enhanced using a message transmitted from the headend to the subscriber which is indicative of an error in a subscriber transmission time with respect to the time slot. A feedback loop process is used to determine at least one of fractional symbol timing correction and carrier phase correction of a transmission from the subscriber to the headend. Filter coefficients are generated at the headend from a ranging signal transmitted from the subscriber to the headend and transmitting the filter coefficients from the headend to the subscriber, the filter coefficients being used by the subscriber to compensate for noise in a transmission from the subscriber to the headend.

Claims

1. A sample and packet synchronization subsystem interfaced between a cable modem system and a plurality of bit-rate sampled data transmission devices, the sample and packet synchronization subsystem comprising:

a transmit analog-to-digital/receive digital-to-analog converter sub-system, including respective buffers for storing digital sampled data, the respective buffers being coupled between a multiplexer/demultiplexer and respective standard code/decode and subscriber loop interface circuits, each standard code/decode and subscriber loop interface circuit being coupled to a respective bit-rate sampled data transmission device; and

a digital signal processing subsystem, interfaced between the cable modem system and the transmit analog-to-digital/receive digital-to-analog converter sub-system, for transmission and reception through the cable modem system to and from a packet recipient, the digital signal processing subsystem;

determining unsolicited cable modem system grant arrivals in response to a request from the bit-rate sample data transmission device;

synchronizing the storing of sampled packets with the unsolicited cable modem system grant arrivals; and

transmitting to the cable modem system upon receipt of an unsolicited cable modem system grant arrival, currently stored sampled packets for further transmission to the packet recipient over the cable modem system.

2. The sample and packet synchronization subsystem of claim 1, wherein the digital signal processing subsystem:

for transmission;

compresses, packetizes and transmits compressed signals to the cable modem system, and

for reception;

receives incoming digital signals from the cable modem system, depacketizes and decompresses the digital signals and provides decompressed digital signals to the transmit analog-to-digital and receive digital-to-analog converter sub-system.

3. The sample and packet synchronization subsystem of claim 1, wherein the digital signal processing subsystem further comprises grant time calculation circuitry coupled between the transmit analog-to-digital/receive digital-to-analog converter sub-system and the cable modem system, the grant time calculation circuitry deriving a clock for standard code/decode and subscriber loop interface circuits based upon clocks of the cable modem system and providing a pointer to indicate a cutoff portion of buffers in which sampled data is being collected to ensure that data collection deadlines are met.

4. The sample and packet synchronization subsystem of claim 2, wherein the bit-rate sampled data transmission devices comprises voice packet senders and sampled voice packets from voice packet senders are voice compressed.

5. The sample and packet synchronization subsystem of claim 1, wherein the packet recipient comprises a Public Switched Telephone Network.