Liquid crystal display device having auxiliary capacitive electrode

• US 20040174483A1
• Filed: 03/04/2004
• Published: 09/09/2004
• Est. Priority Date: 03/07/2003
• Status: Abandoned Application

• Current Assignee: Casio Computer Company Limited
• Original Assignee: Casio Computer Company Limited
• Inventors: Watanabe, Hitoshi, Ishii, Hiromitsu, Nakamura, Yayoi, Shimomaki, Shinichi
• Application Number:
  US10/794,276
• Publication Number:
  US 20040174483A1
• Time in Patent Office: Days
• US Class Current: 349/139
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 2201/40 Arrangements for improving the aperture ratio

Abstract

A display device includes a substrate, a plurality of scanning lines formed in parallel with each other on the substrate in one direction, a plurality of data lines formed in parallel with each other on the substrate in orthogonal to the scanning lines, a thin film transistor being formed in the vicinity of each intersection of the scanning lines and the data lines and having a semiconductor thin film, a gate electrode connected to one of the scanning lines, a source electrode, a drain electrode connected to one of the scanning lines; pixel electrodes each connected to the source electrode of the thin film transistor, auxiliary capacitive electrodes each having an overlap region that overlaps with the pixel electrodes and forming an auxiliary capacitance with the pixel electrodes, a first insulating film arranged between the auxiliary capacitive electrodes and the data lines, and a second insulting film arranged between the pixel electrodes and the auxiliary capacitive electrodes.

Claims

1. A display device comprising:

a substrate;

a plurality of scanning lines formed in parallel with each other on said substrate in one direction

a plurality of data lines formed in parallel with each other on said substrate in orthogonal to said scanning lines;

a thin film transistor being formed in the vicinity of each intersection of said scanning lines and said data lines and having a semiconductor thin film, a gate electrode connected to one of said scanning lines, a source electrode, a drain electrode connected to one of said data lines;

pixel electrodes each connected to the source electrode of said thin film transistor;

auxiliary capacitive electrodes each having an overlap region that overlaps with said pixel electrodes and forming an auxiliary capacitance with said pixel electrodes;

a first insulating film arranged between said auxiliary capacitive electrodes and said data lines; and

a second insulting film arranged between said pixel electrodes and said auxiliary capacitive electrodes.

2. The display device according to claim 1, wherein the overlap region of each of said auxiliary capacitive electrodes has a larger width than the width of each of said data lines.

3. The display device according to claim 1, wherein the gate electrode and said data lines are formed on the same plane.

4. The display device according to claim 3, wherein said first insulating film is formed on the gate electrode and said data lines, and said scanning lines, the source electrode, the drain electrode, and said auxiliary capacitive electrodes are formed on said first insulating film.

5. The display device according to claim 1, wherein said thin film transistor includes a gate insulating film, and said gate electrode and said data lines are formed on the gate insulating film.

6. The display device according to claim 5, wherein the drain electrode is formed on said first insulating film, and connected to the semiconductor thin film through a contact hole formed to the gate insulating film and said first insulating film and connected to one of said data lines through a contact hole formed to said first insulating film.

7. The display device according to claim 5, wherein the source electrode is formed on said first insulating film, and connected to the semiconductor thin film through a contact hole formed to the gate insulating film and said first insulating film, and each of said pixel electrodes is connected to the source electrode through a contact hole formed to said second insulting film.

8. The display device according to claim 5, wherein the gate electrode is formed under each of said scanning lines.

9. The display device according to claim 8, wherein the width of the gate electrode is larger than the width of each of said scanning lines.

10. The display device according to claim 8, wherein the gate electrode comprises multiple gate electrodes which are arranged in a region corresponding to a portion between the source electrode and the drain electrode and connected to each other by a common connecting portion.

11. The display device according to claim 8, wherein the semiconductor thin film has a U shape, and the gate electrode is formed to cross multiple portions of the U-shape semiconductor thin film, seen from the plane.

12. The display device according to claim 5, further comprising a second auxiliary capacitive electrode formed on said gate insulating film to be overlapped with the semiconductor thin film.

13. The display device according to claim 5, further comprising a second auxiliary capacitive electrode formed on said gate insulating film to be overlapped with the source electrode.

14. The display device according to claim 5, further comprising a second auxiliary capacitive electrode formed on said gate insulating film to be overlapped with the semiconductor thin film and the source electrode.

15. The display device according to claim 14, wherein said second insulating film is formed of resin.

16. The display device according to claim 1, wherein part of each of said pixel electrodes is overlapped with said scanning lines adjacent to each of said pixel electrodes.

17. The display device according to claim 1, wherein said thin film transistor has a gate insulating film,

said semiconductor thin film and said data lines are formed on the gate insulating film,

the source electrode and the drain electrode are formed on said semiconductor thin film, and

said first insulating film is formed on said data lines, the source electrode, the drain electrode, and the gate insulating film in a region where said data lines, the source electrode, the drain electrode are not formed.

18. The display device according to claim 1, wherein an extending portion that is overlapped with at least the part of a gap between each of said pixel electrodes and the gate electrode of said thin film transistor is extended from each of said auxiliary capacitive electrodes.

19. The display device according to claim 1, wherein an extending portion that is overlapped with a gap between each of said pixel electrodes and each of said scanning lines, and is extended from each of said auxiliary capacitive electrodes.

20. The display device according to claim 1, further comprising a transparent auxiliary capacitive line being overlapped with at least the overlap region of each of said auxiliary capacitive electrodes and having a larger width than the width of each of said auxiliary capacitive electrodes.

21. The display device according to claim 1, wherein a connecting portion that connects said auxiliary capacitive electrodes to each other is formed between said auxiliary capacitive electrodes adjacent to other, and said auxiliary capacitive electrodes are arrayed in a lattice as a whole.

22. The display device according to claim 21, wherein said connecting portion is formed in a region including a gap between each of said pixel electrodes and each of said scanning lines and a region corresponding to the entirety of one of said scanning lines.

23. The display device according to claim 21, wherein said connecting portion is overlapped with the semiconductor thin film of said thin film transistor.

24. The display device according to claim 21, wherein one part of each of said scanning lines is overlapped with the connecting portion of said auxiliary capacitive electrodes and the other part is overlapped with an adjacent pixel electrode instead of being overlapped with the connecting portion.