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Wafer level system for producing burn-in/screen, and reliability evaluations to be performed on all chips simultaneously without any wafer contacting

  • US 20040175851A1
  • Filed: 03/16/2004
  • Published: 09/09/2004
  • Est. Priority Date: 03/19/2001
  • Status: Active Grant
First Claim
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1. A method for electrically stressing through a specified voltage at least one semiconductor chip on a wafer for controlled contactless burn-in, voltage screen and reliability evaluation of product wafers, said method comprising:

  • applying said voltage to said at least one chip for the probing thereof in the absence of physically contacting the chip surface; and

    magnetically inducing said voltage to said at least one chip through the interposition of a mask onto which the voltage is induced and thereafter conducted to electrical contacts on said wafer.

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