Method and apparatus for controlling an external RF device with a dual processor system
First Claim
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1. An apparatus for outputting a serial link to control a device, comprising:
- a first processor operatively connected to a first bus; and
a second processor operatively connected to a second bus;
a first control circuit for receiving and storing an address, a read/write strobe signal and data outputted from the first processor through the first bus, and outputting serial data derived from the data outputted from the first processor;
a second control circuit for receiving and storing an address, a read/write strobe signal and data outputted from the second processor through the second bus, and outputting serial data derived from the data outputted from the first processor;
an arbiter for receiving serial link request signal from each of the first and second control circuits, and for outputting at least one of a serial link grant signal and an MUX selection signal according to a predetermined priority; and
a multiplexer(MUX) for selectively outputting the selected serial data from either one of the first or second control circuits in response to the MUX selection signal from the arbiter.
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Abstract
A method and apparatus for controlling a device by a serial link from a dual processor system. The configuration of the circuit is simplified and efficiency is enhanced by using independent internal buses and serial link control hardware for each processor and by selecting the active control hardware through arbitration. An MCU and a DSP can operate asynchronously and use their respective internal bus at the same time.
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Citations
19 Claims
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1. An apparatus for outputting a serial link to control a device, comprising:
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a first processor operatively connected to a first bus; and
a second processor operatively connected to a second bus;
a first control circuit for receiving and storing an address, a read/write strobe signal and data outputted from the first processor through the first bus, and outputting serial data derived from the data outputted from the first processor;
a second control circuit for receiving and storing an address, a read/write strobe signal and data outputted from the second processor through the second bus, and outputting serial data derived from the data outputted from the first processor;
an arbiter for receiving serial link request signal from each of the first and second control circuits, and for outputting at least one of a serial link grant signal and an MUX selection signal according to a predetermined priority; and
a multiplexer(MUX) for selectively outputting the selected serial data from either one of the first or second control circuits in response to the MUX selection signal from the arbiter. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method for controlling a device through a serial link with a dual processor system, said method comprising the steps of:
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enabling a first processor operatively connected to a first control circuit through a first bus, and a second processor operatively connected to a second control circuit through a second bus, to independently access respective address, a read/write strobe signal and data through the first and second buses regardless of a serial link use grant;
transmitting a serial link request signal output from the first or second control circuit to an arbiter for selecting which of the first and second processors shall be the source of the data to be transmitted by a serial link to control the device; and
transmitting serial data, and a serial enable signal, and a serial clock signal, outputted from one of the first and second control circuits, to the device when a serial link grant signal is applied from the arbiter by a predetermined priority. - View Dependent Claims (14, 15, 16, 17, 18, 19)
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Specification