Programmable video motion accelerator method and apparatus

• US 20040179599A1
• Filed: 03/13/2003
• Published: 09/16/2004
• Est. Priority Date: 03/13/2003
• Status: Abandoned Application

• Current Assignee: Motorola Mobility LLC (Lenovo Group Ltd.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Moseler, Kathy, Lakshmanan, Chandrasekhar, Jones, Zhong Li, Subramaniyan, Raghavan
• Application Number:
  US10/387,627
• Publication Number:
  US 20040179599A1
• Time in Patent Office: Days
• US Class Current: 375/240.12
• CPC Class Codes: H04N 19/43 Hardware specially adapted for motion estimation or compensation
• CPC Class Codes: H04N 19/523 with sub-pixel accuracy
• CPC Class Codes: H04N 5/145 Movement estimation for video coding H04N19/51

Abstract

A programmable video motion accelerator includes a hardware-based video motion estimator (11), a hardware-based difference computer (13), and a hardware-based video motion compensator (12) having at least a first video input and a second video input that is integrally and operably coupled to the video motion estimator. In one embodiment, the video motion estimator and the video motion compensator share programmed elements (15) including, for example, results buffers. A controller (10) can serve to permit selective re-configuration of various elements and data flow paths to thereby facilitate compatible support of various video processing standards and methods.

Claims

1. A programmable video motion accelerator comprising:

a hardware-based video motion estimator;

a hardware-based difference computer

a hardware-based video motion compensator having;

a first video input;

a second video input that is integrally and operably coupled to the video motion estimator.

2. The programmable video motion accelerator of claim 1 wherein the video motion estimator includes a picture extension padder.

3. The programmable video motion accelerator of claim 1 wherein the video motion estimator includes a results buffer.

4. The programmable video motion accelerator of claim 3 wherein the results buffer includes both a chrominance results buffer and a luminance results buffer.

5. The programmable video motion accelerator of claim 3 wherein the results buffer is integrally and operably coupled to the second video input.

6. The programmable video motion accelerator of claim 1 wherein the video motion compensator includes a motion compensation results output.

7. The programmable video motion accelerator of claim 6 and further comprising an integral datapath controller that is operably coupled to the video motion compensator.

8. The programmable video motion accelerator of claim 7 wherein the datapath controller operably couples to the motion compensation results output of the video motion compensator.

9. The programmable video motion accelerator of claim 8 wherein the video motion compensator further includes an integral adder and wherein the datapath controller further operably couples to the adder, such that the datapath controller can selectively operatively couple the motion compensation results output of the video motion compensator to the adder of the video motion compensator.

10. The programmable video motion accelerator of claim 1 wherein the video motion estimator includes at least one interpolation circuit.

11. The programmable video motion accelerator of claim 10 wherein the video motion compensator selectively shares usage of the at least one interpolation circuit.

12. The programmable video motion accelerator of claim 11 and further comprising an integral datapath/memory controller that is operably coupled to the video motion estimator and the video motion compensator such that the datapath/memory controller selectively controls shared usage of the at least interpolation circuit by the video motion compensator.

13. The programmable video motion accelerator of claim 1 and further comprising a datapath/memory controller and host interface that is operably coupled to the video motion estimator and the video motion compensator.

14. The programmable video motion accelerator of claim 13 wherein the datapath/memory controller and host interface further comprises an accelerator interface such that the programmable video motion accelerator is selectively coupleable to at least one other external processor.

15. A method comprising:

providing a programmable integral hardware platform having;

a video motion estimation circuit;

a difference computer circuit; and

a video motion compensation circuit;

using the programmable integral hardware platform to selectively accelerate at least one of video motion estimation, difference computation, and video motion compensation.

16. The method of claim 15 wherein providing a programmable integral hardware platform further includes providing a video motion estimation circuit having at least one interpolator circuit that is selectively directly coupleable to an input of the video motion compensation circuit.

17. The method of claim 16 wherein providing a video motion estimation circuit having at least one interpolator circuit includes providing a video motion estimation circuit having at least two interpolator circuits that are selectively directly coupleable to at least one input of the video motion compensation circuit.

18. The method of claim 17 wherein providing a video motion estimation circuit having at least two interpolator circuits includes providing a video motion estimation circuit having at least a luminance data interpolator circuit and a chrominance data interpolator circuit.

19. The method of claim 18 wherein providing a video motion estimation circuit having at least a luminance data interpolator circuit and a chrominance data interpolator circuit includes providing a video motion estimation circuit having at least a luminance data half-pixel interpolator circuit and a chrominance data half-pixel interpolator circuit

20. The method of claim 15 wherein providing a programmable integral hardware platform further includes providing a video motion estimation circuit having a picture extension padding circuit.

21. The method of claim 15 wherein providing a programmable integral hardware platform having a video motion estimation circuit includes providing a video motion estimation circuit having native hardware-based local buffers for search window data, macroblock data, and best-matched chrominance data.

22. The method of claim 21 wherein providing a programmable integral hardware platform having a video motion estimation circuit includes providing a video motion estimation circuit having local buffer data access.

23. The method of claim 15 wherein using the programmable integral hardware platform to selectively accelerate at least one of video motion estimation and video motion compensation includes selecting a particular motion estimation algorithm from amongst a plurality of motion estimation algorithms and programming the programmable integral hardware platform to compatibly facilitate the particular motion estimation algorithm.

24. The method of claim 15 and further comprising using at least one external processor to process a motion estimation algorithm.