Multi-channel video compression system

• US 20040179600A1
• Filed: 03/14/2003
• Published: 09/16/2004
• Est. Priority Date: 03/14/2003
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Wells, Aaron G., LeGall, Didier
• Granted Patent: US 7,907,665 B2
• Time in Patent Office: Days
• US Class Current: 375/240.12
• CPC Class Codes: H04N 19/436 using parallelised computational arrangements
• CPC Class Codes: H04N 19/61 in combination with predictive coding
• CPC Class Codes: H04N 7/088 the inserted signal being digital

Abstract

An apparatus generally comprising an input circuit, a storage circuit and an output circuit is disclosed. The input circuit may be configured to generate a first intermediate signal from a plurality of input video signals. The storage circuit may be configured to (i) organize the first intermediate signal into a plurality of sequences each related to one of the input video signals and (ii) generate a second intermediate signal from the sequences. The output circuit may be configured to generate an output video signal by compressing the second intermediate signal.

Claims

1. An apparatus comprising:

an input circuit configured to generate a first intermediate signal from a plurality of input video signals;

a storage circuit configured to (i) organize said first intermediate signal into a plurality of sequences each related to one of said input video signals and (ii) generate a second intermediate signal from said sequences; and

an output circuit configured to generate an output video signal by compressing said second intermediate signal.

2. The apparatus according to claim 1, wherein said input circuit is further configured to:

generate said first intermediate signal by decimating at least one of said input video signals in time.

3. The apparatus according to claim 2, wherein said input circuit is further configured to:

decimate said at least one of said input video signals by periodically eliminating at least one picture from said at least one of said input video signals.

4. The apparatus according to claim 2, wherein said input circuit is further configured to:

decimate at least two of said input video signals using different time ratios in response to different priorities between said at least two of said input video signals.

5. The apparatus according to claim 2, wherein said input circuit is further configured to:

decimate at least two of said input video signals using different spatial resolutions.

6. The apparatus according to claim 1, wherein said output circuit is further configured to:

generate said output video signal by (i) generating a plurality of intermediate sequences by encoding each of said sequences separately using a motion-compensated compression and (ii) concatenating said intermediate sequences.

7. The apparatus according to claim 1, wherein said output circuit is further configured to:

generate said output video signal by (i) generating a plurality of intermediate sequences by encoding each of said sequences in turn and (ii) interleaving said intermediate sequences.

8. The apparatus according to claim 9, wherein said output circuit is further configured to:

generate said intermediate sequences by offsetting intra-frame coded pictures from each other within each of said sequences.

9. The apparatus according to claim 1, wherein said input circuit is further configured to:

add a unique identifier to at least one of said input video signals.

10. The apparatus according to claim 9, wherein said unique identifier is disposed within an active picture area of said at least one of said input video signals.

11. The apparatus according to claim 9, wherein said unique identifier is coded in said at least one of said input video signals as a closed caption signal.

12. The apparatus according to claim 9, wherein said output circuit is further configured to:

read said unique identifier from said at least one of said input video signals.

13. The apparatus according to claim 12, wherein said output circuit is further configured to:

add said unique identifier to said output video signal independent of pictures for said at least one input video signal.

14. The apparatus according to claim 1, wherein said input circuit is further configured to:

add a unique identifier to said first intermediate signal identifying at least one of said input video signals.

15. The apparatus according to claim 1, wherein said input circuit is further configured to:

generate a unique identifier for at least one of said input video signals in one range of a decode time stamp range and a presentation time stamp range.

16. The apparatus according to claim 1, wherein said output circuit is further configured to:

generate a plurality of output video signals from said second intermediate signal; and

maintain a separate context for each of said input video signals.

17. The apparatus according to claim 16, wherein at least one of said input video signals is encoded into at least two of said output video signals substantially simultaneously.

18. The apparatus according to claim 1, wherein said output circuit is further configured to:

maintain a single context for said input video signals; and

encode said sequences in a bitstream order.

19. The apparatus according to claim 1, further comprising:

a composite circuit configured to generate a second output video signal from said second intermediate signal, said second output video signal having a plurality of pictures each having one decimated picture from among said input video signals.

20. An apparatus comprising:

a storage circuit configured to generate a first intermediate signal representing a plurality of input video signals;

an output circuit configured to generate a plurality of second intermediate signals, one for each of said input video signals, by compressing said first intermediate signal; and

a multiplexer configured to generate a plurality of output video signals by multiplexing said second intermediate signals.

21. The apparatus according to claim 20, further comprising:

an input circuit configured to decimate at least one of said input videos signals in time.

22. The apparatus according to claim 20, wherein:

said output circuit is further configured to generate said second intermediate signals using a variable bit rate encoding; and

said multiplexer is further configured to route said second intermediate video signals among said output video signals in response to a constraint on at least one of said output video signals for a predetermined time interval.

23. The apparatus according to claim 20, wherein said output circuit is further configured to:

generate said second intermediate signals to fit within a predetermined total storage capacity for a predetermined time interval.

24. The apparatus according to claim 20, wherein said output circuit is further configured to:

generate said second intermediate signals by offsetting intra-frame coded pictures from each other within each of said input video signals.

25. The apparatus according to claim 20, wherein said storage circuit is further configured to:

generate said first intermediate signal by synchronizing information in said input video signals to a common time base.

26. An apparatus comprising:

an input circuit configured to generate (i) a first intermediate signal having a first resolution from a plurality of input video signals and (ii) a second intermediate signal having a second resolution from said input video signals, where said second resolution is lower than said first resolution; and

an output circuit configured to generate (i) a first video output signal by compressing said first intermediate signal and (ii) a second video output signal by compressing said second intermediate signal.

27. The apparatus according to claim 26, further comprising:

a composite circuit configured to generate a third output video signal from said second intermediate signal, said third output video signal having a plurality of pictures each having one decimated picture from each of said input video signals.

28. The apparatus according to claim 27, wherein said output circuit is further configured to:

generate said first output video signal incorporating said third output video signal.

29. The apparatus according to claim 27, further comprising:

a multiplexer configured to generate at least one fourth output video signal by multiplexing said first output video signal, said second output video signal and said third output video signal.

30. The apparatus according to claim 27, further comprising:

a storage circuit configured to store said first output video signal; and

a display circuit configured to display said third output video signal.

31. The apparatus according to claim 26, wherein said input circuit is further configured to:

generate said first intermediate signal to include at least one still frame having a third resolution from said input video signals, wherein said third resolution is higher than said first resolution.

32. The apparatus according to claim 26 wherein said input circuit is further configured to:

generate said first intermediate signal by multiplexing at least two of said input video signals together without temporal decimation.

33. An apparatus comprising:

an input circuit configured to generate an intermediate signal from a plurality of input video signals;

a storage circuit configured to store at least one reference picture for each of said input video signals; and

an output circuit configured to generate an output video signal by compressing said intermediate signal using said reference pictures.