FLEXIBLE ELECTRONIC CIRCUITS AND DISPLAYS

• US 20040180476A1
• Filed: 11/25/2003
• Published: 09/16/2004
• Est. Priority Date: 04/18/2000
• Status: Active Grant

• Current Assignee: E Ink Corporation (E Ink Holdings Incorporated)
• Original Assignee: E Ink Corporation (E Ink Holdings Incorporated)
• Inventors: Cole, David John, Au, Joanna F., Chen, Yu, Kane, Nathan R., Kazlas, Peter T.
• Granted Patent: US 7,893,435 B2
• Time in Patent Office: Days
• US Class Current: 438/146
• CPC Class Codes: G02F 1/133305 Flexible substrates, e.g. plastics, organic film
• CPC Class Codes: G02F 1/167 by electrophoresis
• CPC Class Codes: G02F 1/16755 Substrates
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: Y10T 156/10 Methods of surface bonding and/or assembly therefor

Abstract

A backplane for use in an electro-optic display comprises a patterned metal foil having a plurality of apertures extending therethrough, coated on at least side with an insulating polymeric material and having a plurality of thin film electronic devices provided on the insulating polymeric material.

Claims

1. A backplane for use in an electro-optic display, the backplane comprising a patterned metal foil having a plurality of apertures extending therethrough, coated on at least side with an insulating polymeric material and having a plurality of thin film electronic devices provided on the insulating polymeric material.

2. A backplane according to claim 1 wherein the apertures are arranged on a rectangular grid.

3. A backplane according to claim 1 wherein the apertures occupy at least about 30 percent of the area of the patterned metal foil.

4. A backplane according to claim 3 wherein the apertures occupy at least about 60 percent of the area of the patterned metal foil.

5. A backplane according to claim 1 wherein the patterned metal foil is coated on both sides with an insulating polymeric material.

6. A backplane according to claim 5 wherein the patterned metal foil is coated on both sides with the same insulating polymeric material.

7. A backplane according to claim 5 wherein the patterned metal foil is coated on its two sides with different insulating polymeric materials.

8. A backplane according to claim 1 wherein each of the thin film electronic devices lies entirely within the area of one aperture in the metal foil.

9. A backplane according to claim 1 wherein each of the thin film electronic devices extends across a plurality of apertures in the metal foil.

10. An electro-optic display comprising a backplane according to claim 1.

11. An electro-optic display according to claim 10 comprising an encapsulated electrophoretic electro-optic medium.

12. A backplane for use in an electro-optic display, the backplane comprising a metal foil coated on at least one side with an insulating polymeric material and having a plurality of thin film electronic devices provided on the insulating polymeric material, the backplane further comprising at least one conductive via extending through the polymeric material and electrically connecting at least one of the thin film electronic devices to the metal foil.

13. A backplane according to claim 12 wherein the metal foil serves as at least one of an antenna, an inductor loop, a power plane, a capacitor, a capacitor contact, a pixel electrode, and electromagnetic induction shielding.

14. An electro-optic display comprising a backplane according to claim 12.

15. An electro-optic display according to claim 14 in the form a smart card having an electro-optic display thereon, and wherein the metal foil serves to communication between the card and a card reading apparatus.

16. A process for driving a backplane comprising a conductive layer, an insulating layer and at least one transistor disposed on the opposed side of the insulating layer from the conductive layer, the process comprising varying the voltage applied to the gate of the transistor and thereby switching the transistor between on and off states, the process further comprising maintaining the conductive layer at a voltage different from ground and within the range of voltages applied to the source of the transistor during driving of the backplane.

17. A process according to claim 16 wherein the voltage applied to the conductive layer satisfies the relation:

(3*Vmax+Vmin)/4>

Vc>

(Vmax+3*Vmin)/4

where Vmax and Vmin are respectively the maximum and minimum voltages applied to the source during driving, and Vc is the voltage applied to the conductive layer.

18. A process according to claim 17 wherein the voltage applied to the conductive layer satisfies the relation:

(3*Vmax)+2*Vmin)/5>

Vc>

(2*Vmax+3*Vmin)/5.

19. A process according to claim 18 wherein the voltage applied to the conductive layer substantially satisfies the relation:

Vc=(Vmax+Vmin)/2.

20. A process for forming a plurality of electronic components on a polymeric material coating a metal substrate, the process comprising forming a plurality of discrete areas of polymeric material on the metal substrate and thereafter forming the plurality of electronic components on the discrete areas of polymeric material.

21. A process according to claim 20 wherein a continuous layer of the polymeric material is formed on the metal substrate and thereafter this continuous layer is divided to form the discrete areas of polymeric material.

22. A process according to claim 20 wherein at least some of the edges of the discrete areas of polymeric material are undercut.

23. A process according to claim 22 wherein the undercutting of the edges of the discrete areas of polymeric material is effected by an etching step.

24. An electro-optic display having a metal substrate, the display having a central portion comprising an electro-optic material and means for writing an image on the electro-optic material, and a peripheral portion extending around at least part of the periphery of the central portion, the peripheral portion having a plurality of apertures extending through the metal substrate, by means of which apertures the electro-optic display may be stitched to a flexible medium.

25. An electro-optic display according to claim 24 wherein the peripheral portion of such a display is free from the electro-optic material.

26. An electro-optic display according to claim 24 wherein the peripheral portion extends completely around the central portion so that the entire periphery of the electro-optic display can be stitched into the fabric or other flexible material.

27. A process for forming an electro-optic display on a substrate curved in one dimension, the process comprising:

providing a backplane having at least one pixel electrode, the backplane being curved in one dimension;

applying to the backplane a laminate comprising a layer of electro-optic medium and a light-transmissive electrically-conductive layer, the laminate being applied so that the electro-optic medium lies between the backplane and the electrically-conductive layer; and

bonding the laminate to the backplane under heat and/or pressure.

28. A process according to claim 27 wherein the laminate further comprises a layer of lamination adhesive overlying the layer of electro-optic medium, and the layer of lamination adhesive is contacted with the backplane.

29. A process for forming an electro-optic display on a substrate curved in one dimension, the process comprising:

providing a backplane having at least one pixel electrode, the backplane being curved in one dimension;

providing a double release film comprising a layer of a solid electro-optic medium having first and second adhesive layers on opposed sides thereof, at least one of the adhesive layer being covered by a release sheet;

exposing one of the first and second adhesive layers and laminating the double release sheet to the backplane; and

exposing the other of the first and second adhesive layers and laminating the exposed adhesive layer to an electrically-conductive layer.

30. A process for forming an electro-optic display on a curved backplane having at least one pixel electrode, the process comprising:

applying a coatable electro-optic medium on to the surface of the backplane to form a coherent layer of the electro-optic medium thereon;

applying a transparent electrically-conductive layer on to the surface of the electro-optic medium on the backplane to form a coherent layer of the electrically-conductive layer thereon; and

applying a transparent encapsulant on to the surface of the electrically-conductive layer to form a coherent layer of the encapsulant thereon.

31. A process according to claim 30 further comprising applying an edge sealant around at least part of the edge of the display.