Semiconductor device and method of manufacturing the same

• US 20040183074A1
• Filed: 04/05/2004
• Published: 09/23/2004
• Est. Priority Date: 03/28/1997
• Status: Active Grant

• Current Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Nakanishi, Shiro, Hirai, Kyoko, Yamada, Tsutomu, Jinno, Yushi, Yoneda, Kiyoshi, Morimoto, Yoshihiro
• Granted Patent: US 7,045,818 B2
• Time in Patent Office: Days
• US Class Current: 257/66
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile

Abstract

In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×10²⁰ atoms/cm³ at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.

Claims

1. A semiconductor device comprising:

(a) a substrate; and

(b) a semiconductor film disposed on an upper surface of said substrate and containing a number of hydrogen atoms nearly equal to or less than the number of dangling bonds in said semiconductor film.

2. A semiconductor device according to claim 1, wherein said semiconductor film is a polysilicon film in which said hydrogen atoms are contained in a specified density nearly equal to or less than 5×

10²⁰ atoms/cm³.

3. A method of manufacturing a semiconductor device in which a number of hydrogen atoms contained in a semiconductor film is nearly equal to or less than the number of dangling bonds in the semiconductor film, said method comprising the steps of:

(a) forming a semiconductor film on a surface of a substrate;

(b) decreasing the density of the hydrogen atoms in the semiconductor film by removing the hydrogen atoms from the semiconductor film by an annealing process; and

(c) after said annealing process, treating the semiconductor film with a process for preventing penetration of any excessive hydrogen atoms into the semiconductor film.

4. A method of manufacturing a semiconductor device, comprising the steps of:

(a) forming a semiconductor film on a surface of a substrate;

(b) forming a silicon nitride film over the semiconductor film; and

(c) treating the substrate with a thermal annealing process after said forming of the silicon nitride film.

5. A semiconductor device manufacturing method according to claim 4, wherein said forming of the silicon nitride film is carried out by Plasma CVD.

6. A semiconductor device manufacturing method according to claim 4, wherein said thermal annealing process is carried out at a substrate temperature of 350°

C. to 400°

C. for one to three hours/

7. A semiconductor device manufacturing method according to claim 4, wherein said thermal annealing process is carried out at a substrate temperature of approximately 400°

C. for approximately two hours.

8. A semiconductor device manufacturing method according to claim 4, wherein said thermal annealing process is carried out under nitrogen atmosphere.

9. A semiconductor device manufacturing method according to claim 4, wherein after said forming of the semiconductor film and before said forming of the silicon nitride film, the density of the hydrogen atoms contained in the semiconductor film is decreased by previously removing the hydrogen atoms from the semiconductor film by an annealing process.

10. A semiconductor device manufacturing method according to claim 9, wherein said semiconductor film is formed as amorphous silicon film on the substrate;

said amorphous silicon film is annealed to decrease the density of hydrogen atoms, which are contained in the amorphous silicon film by removing the hydrogen atoms from the amorphous silicon film;

a polysilicon film is formed by polycrystallizing the amorphous silicon film by another annealing process;

the silicon nitride film is formed over the polysilicon film by plasma CVD; and

the substrate is treated with a thermal-annealing process after said forming of the silicon nitride film.

11. A method of manufacturing a thin film transistor, comprising the steps of:

(a) forming a gate electrode on a surface of a substrate;

(b) forming a gate insulating film and a non-crystalline silicon film in the described order over the substrate so as to cover the gate electrode;

(c) decreasing the density of hydrogen atoms, which are contained in the non-crystalline silicon film, by removing the hydrogen atoms from the non-crystalline silicon film by an annealing process;

(d) forming a polysilicon film by polycrystallizing the non-crystalline silicon film by another annealing process;

(e) patterning the polysilicon film in a predetermined shape and then forming an impurity-doped region at a predetermined area in the patterned polysilicon film;

(f) after said forming of the impurity-doped region., forming a silicon nitride film so as to cover the patterned polysilicon film by plasma CVD and then treating the substrate, on which the polysilicon film and the silicon nitride film have been formed, with a thermal annealing process;

(g) after said thermal annealing process, removing selected portions of the silicon nitride film in such a manner that a surface of the impurity-doped region in the polysilicon film is exposed; and

(h) forming a source electrode and a drain electrode in the exposed portions of the impurity-doped region to thereby connect the source electrode and the drain electrode to the impurity-doped region at their corresponding portions.

12. A thin film transistor manufacturing method according to claim 11, wherein said thermal annealing process is carried out at a substrate temperature of 350°

C. to 400°

C. for one to three hours.

13. A thin film transistor manufacturing method according to claim 11, wherein said thermal annealing process is carried out at a substrate temperature of approximately 400°

C. for approximately two hours.

14. A thin film transistor manufacturing method according to claim 11, wherein said thermal annealing process is carried out under nitrogen atmosphere.

15. A thin film transistor manufacturing method according to claim 11, wherein the number of hydrogen atoms contained in the polysilicon film is nearly equal to or less than the number of dangling bonds in the polysilicon film.

16. A thin film transistor manufacturing method according to claim 13, wherein the density of the hydrogen atoms contained in the polysilicon film is approximately 5×

10²⁰ atoms/cm³.