MICROSYSTEM PACKAGE STRUCTURE

• US 20040184133A1
• Filed: 06/24/2003
• Published: 09/23/2004
• Est. Priority Date: 03/18/2003
• Status: Active Grant

• Current Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Original Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Inventors: Su, Tao, Chen, Chih-Lung, Liau, Hsing-Jung, Yee, Kuo-Chung, Kao, Jen-Chieh
• Granted Patent: US 6,809,852 B2
• Time in Patent Office: Days
• US Class Current: 359/290
• CPC Class Codes: G02B 7/1821 for rotating or oscillating mirrors
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Abstract

The present invention relates to a package structure for a microsystem, comprising a substrate, a chip, an adhesive structure, a carrying substrate, a micro-mechanism, a plurality of wires, an annular body and a transparent plate. The chip is placed on the substrate. The annular adhesive structure having an opening is placed on the chip. The carrying substrate is placed on the adhesive structure, thus forming an interspace between the chip, the adhesive structure and the carrying substrate. The pressure inside the interspace can be balanced with the pressure outside the interspace through the opening. The micro-mechanism is disposed on the carrying substrate. The annular body is formed on the substrate and the transparent plate is attached on the annular body, thus forming a closed chamber between the substrate, the annular body and the transparent plate. The chip, the micro-mechanism, the adhesive structure, the carrying substrate and the wires are disposed within the closed chamber.

Claims

1. A microsystem package structure, comprising:

a first substrate;

a chip disposed on the first substrate and electrically connected to the first substrate;

an adhesive structure disposed on the chip, wherein the adhesive structure has at least an opening and is in an annular shape;

a carrying substrate disposed on the adhesive structure, wherein an interspace is formed between the chip, the adhesive structure and the carrying substrate;

a micro-mechanism disposed on the carrying substrate;

an annular body attached to the first substrate, wherein a chamber is formed between the annular body and the first substrate and wherein the chip, the carrying substrate, the micro-mechanism and the adhesive structure are disposed within the chamber; and

a second substrate disposed on the annular body and sealed the chamber, wherein a pressure of the interspace is balanced with that of the chamber.

2. The microsystem package structure of claim 1, wherein a first surface of the chip comprises a memory region and a plurality of chip nodes are arranged along a peripheral region of the memory region on the first surface of the chip, and wherein the adhesive structure is disposed between the memory region and the chip nodes on the first surface of the chip.

3. The microsystem package structure of claim 1, wherein the micro-mechanism includes a micro-mirror mechanism and the micro-mirror mechanism includes a plurality of micro-mirror sets, each micro-mirror set comprising:

a supporting stalk, wherein one end of the stalk is connected to the carrying substrate;

a hinge, wherein the other end of the stalk is connected to the hinge; and

a micromirror, wherein one side of the micromirror is connected to the hinge, so that the micromirror rotates by using the hinge as a rotation center.

4. The microsystem package structure of claim 1, wherein the microsystem package structure further comprises a plurality of wires, for electrically connecting the chip and the first substrate.

5. The microsystem package structure of claim 1, wherein the annular body and the first substrate are fabricated integrally.

6. The microsystem package structure of claim 1, wherein the microsystem package structure further comprises a desiccant in the closed chamber between the annular body, the second substrate and the first substrate.

7. The microsystem package structure of claim 1, wherein the second substrate is made of glass.

8. The microsystem package structure of claim 1, wherein the annular adhesive structure is tetragonal.

9. The microsystem package structure of claim 8, wherein the opening is disposed in a middle portion of a side of the adhesive structure.

10. The microsystem package structure of claim 8, wherein the opening is disposed at a corner of the adhesive structure.

11. The microsystem package structure of claim 8, wherein the adhesive structure has a plurality of openings at corners of the adhesive structure.

12. The microsystem package structure of claim 1, wherein the adhesive structure further includes a protrusion around the opening and on an outer side of the adhesive structure.

13. The microsystem package structure of claim 1, wherein the carrying substrate and the first substrate are transparent.

14. The microsystem package structure of claim 1, wherein the chip is a memory chip.