Assembly of semiconductor device, interposer and substrate

• US 20040184219A1
• Filed: 03/17/2004
• Published: 09/23/2004
• Est. Priority Date: 03/19/2003
• Status: Active Grant

• Current Assignee: NGK Spark PLUG Company Limited (Niterra Co., Ltd.)
• Original Assignee: NGK Spark PLUG Company Limited (Niterra Co., Ltd.)
• Inventors: Sato, Motohiko, Sato, Manabu, Otsuka, Jun, Hayashi, Kazuhiro, Ito, Junichi
• Granted Patent: US 7,327,554 B2
• Time in Patent Office: Days
• US Class Current: 361/306.3
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2224/16265 the item being a discrete passive component
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48 of an individual wire connector
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 23/49805 the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/50 for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01038 : Strontium [Sr]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01055 : Cesium [Cs]
• CPC Class Codes: H01L 2924/01056 : Barium [Ba]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15174 : in different layers of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15747 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/19103 : interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H05K 1/0231 : Capacitors or dielectric substances
• CPC Class Codes: H05K 1/145 : Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules
• CPC Class Codes: H05K 1/183 : Components mounted in and supported by recessed areas of the printed circuit board
• CPC Class Codes: H05K 2201/10378 : Interposers

Abstract

An assembly includes a semiconductor device having surface-connecting terminals, a substrate having surface-connecting pads, and a capacitor having an approximately plate-shaped capacitor main body having a first surface on which the semiconductor device is mounted and a second surface at which the capacitor main body is mounted on the substrate and a plurality of electrically conductive vias penetrating the capacitor main body between the first and second surfaces and connected to the surface-connecting terminals and the surface-connecting pads.

Claims

1. A capacitor comprising:

an approximately plate-shaped capacitor main body having a first surface on which a semiconductor device having surface-connecting terminals is to be mounted and a second surface; and

a plurality of electrically conductive vias penetrating the capacitor main body between the first and second surfaces for connection with the surface-connecting terminals.

2. A semiconductor device equipped capacitor assembly comprising:

a semiconductor device having surface-connecting terminals; and

a capacitor having an approximately plate-shaped capacitor main body having a first surface on which the semiconductor device is mounted and a second surface and a plurality of electrically conductive vias penetrating the capacitor main body between the first and second surfaces and connected to the surface-connecting terminals.

3. A capacitor equipped substrate assembly comprising:

a substrate having surface-connecting pads; and

a capacitor having an approximately plate-shaped capacitor main body having a first surface and a second surface at which the capacitor is mounted on the substrate and a plurality of electrically conductive vias penetrating the capacitor main body between the first and second surfaces and connected to the surface-connecting pads.

4. An assembly comprising:

a semiconductor device having surface-connecting terminals;

a substrate having surface-connecting pads; and

a capacitor having an approximately plate-shaped capacitor main body having a first surface on which the semiconductor device is mounted and a second surface at which the capacitor main body is mounted on the substrate and a plurality of electrically conductive vias penetrating the capacitor main body between the first and second surfaces and connected to the surface-connecting terminals and the surface-connecting pads.

5. An interposer comprising:

an interposer main body having a first surface on which a semiconductor device having surface-connecting terminals is mounted and a second surface formed with a recess;

a plurality of interposer main body side electrically conductive vias penetrating the interposer main body between the first surface and a bottom surface of the recess and connected to the surface-connecting terminals; and

a capacitor disposed in the recess and having front and rear surfaces and a plurality of capacitor side electrically conductive vias passing through the front and rear surfaces and connected to the interposer main body side electrically conductive vias.

6. An interposer according to claim 5, further comprising, within the interposer main body, a plurality of short electrically conductive ground vias passing through the first surface and an electrically conductive via pitch changing layer, at least a part of the short electrically conductive ground vias being electrically connected to ground vias of the capacitor side electrically conductive vias by way of the electrically conductive via pitch-changing layer.

7. An interposer according to claim 5, further comprising, within the interposer main body, a plurality of short electrically conductive power vias passing through the first surface and an electrically conductive via pitch-changing layer, at least a part of the short electrically conductive power vias being electrically connected to power vias of the capacitor side electrically conductive vias by way of the electrically conductive via pitch-changing layer.

8. A semiconductor device equipped interposer assembly comprising:

a semiconductor device having surface-connecting terminals; and

an interposer having an approximately plate-shaped interposer main body having a first surface on which the semiconductor device having surface-connecting terminals is mounted and a second surface formed with a recess, a plurality of interposer main body side electrically conductive vias penetrating the interposer main body between the first surface and a bottom surface of the recess and connected to the surface-connecting terminals, and a capacitor disposed in the recess and having front and rear surfaces and a plurality of capacitor side electrically conductive vias extending through the front and rear surfaces and connected to the interposer main body side electrically conductive vias.

9. An interposer equipped substrate assembly comprising:

a substrate having surface-connecting terminals; and

an interposer having an approximately plate-shaped interposer main body having a first surface and a second surface formed with a recess, the interposer main body being mounted at the second surface on the substrate, the interposer further having a plurality of interposer main body side electrically conductive vias penetrating the interposer main body between the first and second surfaces and connected to the surface-connecting terminals and a capacitor disposed in the recess and having front and rear surfaces and a plurality of capacitor side electrically conductive vias passing through the front and rear surfaces and connected to the interposer main body side electrically conductive vias.

10. An assembly comprising:

a semiconductor device having surface-connecting terminals;

a substrate having surface-connecting pads; and

an interposer having an approximately plate-shaped interposer main body having a first surface on which the semiconductor device is mounted and a second surface formed with a recess, the interposer main body being mounted at the second surface on the substrate, the interposer further having a plurality of interposer main body side electrically conductive vias penetrating the interposer main body between the first surface and a bottom surface of the recess and connected to the surface-connecting terminals and a capacitor disposed in the recess and having front and rear surfaces and a plurality of capacitor side electrically conductive vias passing through the front and rear surfaces and connected to the interposer main body side electrically conductive vias and the surface connecting pads.

11. An interposer for electrical connection between a semiconductor device and a package in which the semiconductor device is mounted, comprising:

a capacitor portion having a dielectric layer between inner layer electrodes; and

a surrounding portion surrounding a lateral periphery of the capacitor portion and made of a material having a thermal expansion coefficient smaller than that of the dielectric layer.

12. An interposer according to claim 11, wherein the capacitor portion is configured so as to surround all of the lateral periphery of the capacitor portion.

13. An interposer according to claim 12, wherein the surrounding portion is made of a material having a thermal expansion coefficient of 10 ppm/°

C. or smaller.

14. An interposer according to claim 13, wherein the surrounding portion is made of alumina.

15. An interposer according to claim 11, further comprising a wiring for electrical connection between the IC device and the package, at least part of the wiring being disposed so as to penetrate the surrounding portion.

16. An interposer according to claim 15, wherein the surrounding portion is made of a material having a specific inductive capacity smaller than that of the dielectric layer.

17. A semiconductor device equipped interposer assembly comprising:

a semiconductor device; and

an interposer having a wiring electrically connected to the semiconductor device;

the interposer including a capacitor portion having a dielectric layer between inner layer electrodes, and a surrounding portion surrounding a lateral periphery of the capacitor portion and made of a material having a thermal expansion coefficient smaller than that of the dielectric layer.

18. An interposer equipped package assembly comprising:

an interposer having a wiring; and

a package electrically connected to the wiring of the interposer;

the interposer having a capacitor portion having a dielectric layer between inner layer electrodes, and a surrounding portion surrounding a lateral periphery of the capacitor portion and made of a material having a thermal expansion coefficient smaller than that of the dielectric layer.

19. An assembly comprising:

a semiconductor device;

a package in which the semiconductor device is mounted; and

an interposer interposed between the semiconductor device and the package and connecting therebetween;

the interposer including a capacitor portion having a dielectric layer between inner layer electrodes, and a surrounding portion surrounding a lateral periphery of the capacitor portion and made of a material having a thermal expansion coefficient smaller than that of the dielectric layer.

20. A method of producing an interposer for electrical connection between a semiconductor device and a package in which the semiconductor device is mounted, the interposer including a capacitor portion having a dielectric layer between inner layer electrodes, the method comprising:

forming a surrounding portion that surrounds the capacitor portion from a material having a thermal expansion coefficient smaller than that of the dielectric layer.

21. A method according to claim 20, wherein the forming of the surrounding portion comprises forming the surrounding portion integrally with the capacitor portion.

22. A method according to claim 20, wherein the forming of the surrounding portion comprises fitting the capacitor portion in the surrounding portion.