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Wafer level package, multi-package stack, and method of manufacturing the same

  • US 20040188837A1
  • Filed: 09/22/2003
  • Published: 09/30/2004
  • Est. Priority Date: 03/25/2003
  • Status: Active Grant
First Claim
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1. A semiconductor chip package, comprising:

  • a semiconductor chip which includes a through hole extending there through from an active first surface to an inactive second surface;

    a first conductive pad which at least partially surrounds the through hole on the active first surface of the semiconductor chip;

    a printed circuit board which includes a first surface attached to the inactive second surface of the semiconductor chip, and which further includes a second conductive pad aligned with the through hole of the semiconductor chip; and

    a conductive material which fills the through hole and contacts the first and second conductive pads.

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