Semiconductor device

• US 20040189567A1
• Filed: 04/13/2004
• Published: 09/30/2004
• Est. Priority Date: 12/14/2000
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kimura, Hajime
• Granted Patent: US 9,123,672 B2
• Time in Patent Office: Days
• US Class Current: 345/87
• CPC Class Codes: G02F 1/13338 Input devices, e.g. touch panels
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/042 by opto-electronic means
• CPC Class Codes: G09G 2310/0202 Addressing of scan or signal lines
• CPC Class Codes: G09G 3/2085 Special arrangements for addressing the individual elements of the matrix, other than by driving respective rows and columns in combination
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3659 the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
• CPC Class Codes: G09G 3/3674 Details of drivers for scan electrodes
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14665 Imagers using a photoconductor layer
• CPC Class Codes: H01L 27/14678 Contact-type imagers
• CPC Class Codes: H04N 1/028 for picture information pick-up
• CPC Class Codes: H04N 1/02805 with photodetectors arranged in a two-dimensional array
• CPC Class Codes: H04N 1/0313 Direct contact pick-up heads, i.e. heads having no array of elements to project the scanned image elements onto the photodectors
• CPC Class Codes: H04N 1/0314 : using photodetectors and illumination means mounted in the same plane on a common support or substrate
• CPC Class Codes: H10K 2102/3026 : Top emission
• CPC Class Codes: H10K 59/12 : Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/65 : OLEDs integrated with inorganic image sensors

Abstract

A semiconductor device in which a reduction in size and thinness are realized is provided. The semiconductor device of the present invention can realize a reduction in size by forming light emitting elements as a light source, and photodiodes as photoelectric conversion elements on the same substrate. Further, it becomes possible to control two signal lines by using one driver circuit with using an output switching circuit. As a result, it becomes possible to reduce the area occupied by the driver circuits of the semiconductor device, and the semiconductor device can be made smaller.

Claims

1. A semiconductor device comprising:

a pixel portion comprising a plurality of pixels;

a signal line driver circuit; and

an output switching circuit,

wherein each of the plurality of pixels comprises a sensor portion and a liquid crystal element portion,

wherein the signal line driver circuit outputs a timing signal to the output switching circuit, and

wherein the output switching circuit outputs different signals to the sensor portion and to the liquid crystal element portion.

68. A semiconductor device according to claim 1, wherein each of the plurality of pixels comprises a liquid crystal element, a liquid crystal selection TFT, a photoelectric conversion element, a sensor selection TFT, a sensor driver TFT, a sensor reset TFT.

72. A semiconductor device according to claim 1, wherein each of the plurality of pixels comprises three light emitting elements and one photoelectric conversion element.

79. A display device using a semiconductor device according to claim 1.

86. A scanner using a semiconductor device according to claim 1.

93. A portable information terminal using a semiconductor device according to claim 1.

2. A semiconductor device comprising:

a pixel portion comprising a plurality of pixels;

a signal line driver circuit; and

an output switching circuit,

wherein each of the plurality of pixels comprises a sensor portion and a light emitting element portion,

wherein the output switching circuit comprises a first logical circuit and a second logical circuit,

wherein the signal line driver circuit outputs a timing signal to the first logical circuit and to the second logical circuit,

wherein one of the first logical circuit and the second logical circuit outputs a first signal to the sensor portion, and the other outputs a second signal to the light emitting element portion, and

wherein the first signal is different from the second signal.

8. A semiconductor device according to claim 2, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is a NOR circuit.

14. A semiconductor device according to claim 2, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is a NOR circuit.

20. A semiconductor device according to claim 2, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is an OR circuit.

26. A semiconductor device according to claim 2, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is an OR circuit.

50. A semiconductor device according to claim 2, wherein an output terminal of the first logical circuit is connected to at least one inverter circuit.

56. A semiconductor device according to claim 2, wherein an output terminal of the second logical circuit is connected to at least one inverter circuit.

62. A semiconductor device according to claim 2, wherein each of the plurality of pixels comprises a light emitting element, a selection TFT, a driver TFT, a reset TFT, a photoelectric conversion element, a sensor selection TFT, a sensor driver TFT, and a sensor reset TFT.

65. A semiconductor device according to claim 2 wherein each of the plurality of pixels comprises a light emitting element, a selection TFT, a driver TFT, a photoelectric conversion element, a sensor selection TFT, a sensor driver TFT, and a sensor reset TFT.

73. A semiconductor device according to claim 2, wherein each of the plurality of pixels comprises three light emitting elements and one photoelectric conversion element.

80. A display device using a semiconductor device according to claim 2.

87. A scanner using a semiconductor device according to claim 2.

94. A portable information terminal using a semiconductor device according to claim 2.

3. A semiconductor device comprising:

a pixel portion comprising a plurality of pixels;

a signal line driver circuit; and

an output switching circuit,

wherein each of the plurality of pixels comprises a sensor portion and a liquid crystal element portion,

wherein the output switching circuit comprises a first logical circuit and a second logical circuit,

wherein the signal line driver circuit outputs a timing signal to the first logical circuit and to the second logical circuit,

wherein one of the first logical circuit and the second logical circuit outputs a first signal to the sensor portion, and the other outputs a second signal to the liquid crystal element portion, and

wherein the first signal is different from the second signal.

9. A semiconductor device according to claim 3, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is a NOR circuit.

15. A semiconductor device according to claim 3, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is a NOR circuit.

21. A semiconductor device according to claim 3, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is an OR circuit.

27. A semiconductor device according to claim 3, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is an OR circuit.

51. A semiconductor device according to claim 3, wherein an output terminal of the first logical circuit is connected to at least one inverter circuit.

57. A semiconductor device according to claim 3, wherein an output terminal of the second logical circuit is connected to at least one inverter circuit.

69. A semiconductor device according to claim 3, wherein each of the plurality of pixels comprises a liquid crystal element, a liquid crystal selection TFT, a photoelectric conversion element, a sensor selection TFT, a sensor driver TFT, a sensor reset TFT.

74. A semiconductor device according to claim 3, wherein each of the plurality of pixels comprises three light emitting elements and one photoelectric conversion element.

81. A display device using a semiconductor device according to claim 3.

88. A scanner using a semiconductor device according to claim 3.

95. A portable information terminal using a semiconductor device according to claim 3.

4. A semiconductor device comprising:

a pixel portion comprising a plurality of pixels;

a signal line driver circuit; and

an output switching circuit,

wherein each of the plurality of pixels comprises a sensor portion and a light emitting element portion,

wherein the sensor portion comprises a first TFT, and the light emitting element portion comprises a second TFT,

wherein the output switching circuit comprises a first logical circuit and a second logical circuit;

wherein the first TFT is connected to one of the first logical circuit and the second circuit, and the second TFT is connected to the other,

wherein the signal line driver circuit outputs a timing signal to the first logical circuit and to the second logical circuit,

wherein one of the first logical circuit and the second logical circuit outputs a first signal to the first TFT, and the other outputs a second signal to the second TFT, and

wherein the first signal is different from the second signal.

10. A semiconductor device according to claim 4, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is a NOR circuit.

16. A semiconductor device according to claim 4, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is a NOR circuit.

22. A semiconductor device according to claim 4, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is an OR circuit.

28. A semiconductor device according to claim 4, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is an OR circuit.

38. A semiconductor device according to claim 4, wherein one of the first TFT and the second TFT is a selection TFT, and the other is a sensor selection TFT.

40. A semiconductor device according to claim 4, wherein one of the first TFT and the second TFT is a selection TFT, and the other is a sensor reset TFT.

42. A semiconductor device according to claim 4, wherein one of the first TFT and the second TFT is a reset TFT, and the other is a sensor reset TFT.

44. A semiconductor device according to claim 4, wherein one of the first TFT and the second TFT is a reset TFT, and the other is a sensor selection TFT.

52. A semiconductor device according to claim 4, wherein an output terminal of the first logical circuit is connected to at least one inverter circuit.

58. A semiconductor device according to claim 4, wherein an output terminal of the second logical circuit is connected to at least one inverter circuit.

63. A semiconductor device according to claim 4, wherein each of the plurality of pixels comprises a light emitting element, a selection TFT, a driver TFT, a reset TFT, a photoelectric conversion element, a sensor selection TFT, a sensor driver TFT, and a sensor reset TFT.

66. A semiconductor device according to claim 4, wherein each of the plurality of pixels comprises a light emitting element, a selection TFT, a driver TFT, a photoelectric conversion element, a sensor selection TFT, a sensor driver TFT, and a sensor reset TFT.

75. A semiconductor device according to claim 4, wherein each of the plurality of pixels comprises three light emitting elements and one photoelectric conversion element.

82. A display device using a semiconductor device according to claim 4.

89. A scanner using a semiconductor device according to claim 4.

96. A portable information terminal using a semiconductor device according to claim 4.

5. A semiconductor device comprising:

a pixel portion comprising a plurality of pixels;

a signal line driver circuit; and

an output switching circuit,

wherein each of the plurality of pixels comprises a sensor portion and a liquid crystal element portion,

wherein the sensor portion comprises a first TFT, and the liquid crystal element portion comprises a second TFT,

wherein the output switching circuit comprises a first logical circuit and a second logical circuit;

wherein the first TFT is connected to one of the first logical circuit and the second circuit, and the second TFT is connected to the other,

wherein the signal line driver circuit outputs a timing signal to the first logical circuit and to the second logical circuit,

wherein one of the first logical circuit and the second logical circuit outputs a first signal to the first TFT, and the other outputs a second signal to the second TFT, and

wherein the first signal is different from the second signal.

11. A semiconductor device according to claim 5, wherein one of the first logical circuit and the second logical circuit is a NAND and the other is a NOR circuit.

17. A semiconductor device according to claim 5, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is a NOR circuit.

23. A semiconductor device according to claim 5, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is an OR circuit.

29. A semiconductor device according to claim 5, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is an OR circuit.

46. A semiconductor device according to claim 5, wherein one of the first TFT and the second TFT is a liquid crystal selection TFT, and the other is a sensor selection TFT.

48. A semiconductor device according to claim 5, wherein one of the first TFT and the second TFT is a liquid crystal selection TFT, and the other one is a sensor reset TFT.

53. A semiconductor device according to claim 5, wherein an output terminal of the first logical circuit is connected to at least one inverter circuit.

59. A semiconductor device according to claim 5, wherein an output terminal of the second logical circuit is connected to at least one inverter circuit.

70. A semiconductor device according to claim 5, wherein each of the plurality of pixels comprises a liquid crystal element, a liquid crystal selection TFT, a photoelectric conversion element, a sensor selection TFT, a sensor driver TFT, a sensor reset TFT.

76. A semiconductor device according to claim 5, wherein each of the plurality of pixels comprises three light emitting elements and one photoelectric conversion element.

83. A display device using a semiconductor device according to claim 5.

90. A scanner using a semiconductor device according to claim 5.

97. A portable information terminal using a semiconductor device according to claim 5.

6. A semiconductor device comprising:

a pixel portion having a plurality of pixels;

a signal line driver circuit; and

an output switching circuit,

wherein each of the plurality of pixels comprises a sensor portion and a light emitting element portion,

wherein the sensor portion comprises a first TFT, and the light emitting element portion comprises a second TFT,

wherein the output switching circuit comprises a first logical circuit and a second logical circuit,

wherein an image signal generated by the sensor portion is input to the light emitting element portion,

wherein one of the first logical circuit and the second circuit outputs an off signal to the first signal line, and the other outputs a pulse signal to the second signal line, and

wherein the first signal line outputs the off signal to the first TFT, and the second signal line outputs the pulse signal to the second TFT.

12. A semiconductor device according to claim 6, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is a NOR circuit.

18. A semiconductor device according to claim 6, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is a NOR circuit.

24. A semiconductor device according to claim 6, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is an OR circuit.

30. A semiconductor device according to claim 6, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is an OR circuit.

32. A semiconductor device according to claim 6, wherein one of the first signal line and the second signal line is a selection signal line, and the other is a sensor selection signal line.

33. A semiconductor device according to claim 6, wherein one of the first signal line and the second signal line is a reset signal line, and the other is a sensor reset signal line.

34. A semiconductor device according to claim 6, wherein one of the first signal line and the second signal line is a selection signal line, and the other is a sensor reset signal line.

35. A semiconductor device according to claim 6, wherein one of the first signal line and the second signal line is a reset signal line, and the other one is a sensor selection signal line.

39. A semiconductor device according to claim 6, wherein one of the first TFT and the second TFT is a selection TFT, and the other is a sensor selection TFT.

41. A semiconductor device according to claim 6, wherein one of the first TFT and the second TFT is a selection TFT, and the other is a sensor reset TFT.

43. A semiconductor device according to claim 6, wherein one of the first TFT and the second TFT is a reset TFT, and the other is a sensor reset TFT.

45. A semiconductor device according to claim 6, wherein one of the first TFT and the second TFT is a reset TFT, and the other is a sensor selection TFT.

54. A semiconductor device according to claim 6, wherein an output terminal of the first logical circuit is connected to at least one inverter circuit.

60. A semiconductor device according to claim 6, wherein an output terminal of the second logical circuit is connected to at least one inverter circuit.

64. A semiconductor device according to claim 6, wherein each of the plurality of pixels comprises a light emitting element, a selection TFT, a driver TFT, a reset TFT, a photoelectric conversion element, a sensor selection TFT, a sensor driver TFT, and a sensor reset TFT.

67. A semiconductor device according to claim 6, wherein each of the plurality of pixels comprises a light emitting element, a selection TFT, a driver TFT, a photoelectric conversion element, a sensor selection TFT, a sensor driver TFT, and a sensor reset TFT.

77. A semiconductor device according to claim 6, wherein each of the plurality of pixels comprises three light emitting elements and one photoelectric conversion element.

84. A display device using a semiconductor device according to claim 6.

91. A scanner using a semiconductor device according to claim 6.

98. A portable information terminal using a semiconductor device according to claim 6.

7. A semiconductor device comprising:

a pixel portion comprising a plurality of pixels;

a signal line driver circuit;

an output switching circuit; and

one of a back light and a front light,

wherein each of the plurality of pixels comprises a sensor portion and a liquid crystal element portion,

wherein the sensor portion comprises a first TFT, and the liquid crystal element portion comprises a second TFT,

wherein the output switching circuit comprises a first logical circuit and a second logical circuit,

wherein a first signal line is connected to one of the first logical circuit and the second logical circuit, and a second signal line is connected to the other,

wherein the first TFT is connected to the first signal line, and the second TFT is connected to the second signal line,

wherein the signal line driver circuit outputs a timing signal to the first logical circuit and to the second logical circuit,

wherein an image signal generated by the sensor portion is input to the light emitting element portion,

wherein one of the first logical circuit and the second logical circuit outputs an off signal to the first signal line, and the other outputs a pulse signal to the second signal line, and

wherein the first signal line outputs the off signal to the first TFT, and wherein the second signal line outputs the pulse signal to the second TFT.

13. A semiconductor device according to claim 7, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is a NOR circuit.

19. A semiconductor device according to claim 7, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is a NOR circuit.

25. A semiconductor device according to claim 7, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is an OR circuit.

31. A semiconductor device according to claim 7, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is an OR circuit.

36. A semiconductor device according to claim 7, wherein one of the first signal line and the second signal line is a liquid crystal selection signal line, and the other is a sensor selection signal line.

37. A semiconductor device according to claim 7, wherein one of the first signal line and the second signal line is a liquid crystal selection signal line, and the other is a sensor reset signal line.

47. A semiconductor device according to claim 7, wherein one of the first TFT and the second TFT is a liquid crystal selection TFT, and the other is a sensor selection TFT.

49. A semiconductor device according to claim 7, wherein one of the first TFT and the second TFT is a liquid crystal selection TFT, and the other is a sensor reset TFT.

55. A semiconductor device according to claim 7, wherein an output terminal of the first logical circuit is connected to at least one inverter circuit.

61. A semiconductor device according to claim 7, wherein an output terminal of the second logical circuit is connected to at least one inverter circuit.

71. A semiconductor device according to claim 7, wherein each of the plurality of pixels comprises a liquid crystal element, a liquid crystal selection TFT, a photoelectric conversion element, a sensor selection TFT, a sensor driver TFT, a sensor reset TFT.

78. A semiconductor device according to claim 7, wherein each of the plurality of pixels comprises three light emitting elements and one photoelectric conversion element.

85. A display device using a semiconductor device according to claim 7.

92. A scanner using a semiconductor device according to claim 7.

99. A portable information terminal using a semiconductor device according to claim 7.

100. A semiconductor device comprising:

a pixel portion comprising a plurality of pixels;

a signal line driver circuit; and

an output switching circuit,

wherein each of the plurality of pixels comprises a sensor portion and a light emitting element portion, and

wherein the output switching circuit is connected to the sensor portion and to the light emitting element portion.

102. A semiconductor device according to claim 100, wherein the output switching circuit comprises a first logical circuit and a second logical circuit, and one of the first logical circuit and the second logical circuit is connected to the sensor portion and the other is connected to the light emitting element portion.

104. A semiconductor device according to claim 100, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is a NOR circuit.

106. A semiconductor device according to claim 100, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is a NOR circuit.

108. A semiconductor device according to claim 100, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is an OR circuit.

110. A semiconductor device according to claim 100, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is an OR circuit.

112. A semiconductor device according to claim 102, wherein an output terminal of the first logical circuit is connected to at least one inverter circuit.

114. A semiconductor device according to claim 102, wherein an output terminal of the second logical circuit is connected to at least one inverter circuit.

116. A display device using a semiconductor device according to claim 100.

118. A scanner using a semiconductor device according to claim 100.

120. A portable information terminal using a semiconductor device according to claim 100.

101. A semiconductor device comprising:

a pixel portion comprising a plurality of pixels

a signal line driver circuit; and

an output switching circuit,

wherein each of the plurality of pixels comprises a sensor portion and a liquid crystal element portion, and

wherein the output switching circuit is connected to the sensor portion and to the liquid crystal element portion.

103. A semiconductor device according to claim 101, wherein the output switching circuit comprises a first logical circuit and a second logical circuit, and one of the first logical circuit and the second logical circuit is connected to the sensor portion and the other is connected to the liquid crystal element portion.

105. A semiconductor device according to claim 101, wherein one of the first logical circuit and the second logical circuit is an NAND circuit and the other is a NOR circuit.

107. A semiconductor device according to claim 101, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is a NOR circuit.

109. A semiconductor device according to claim 101, wherein one of the first logical circuit and the second logical circuit is a NAND circuit and the other is an OR circuit.

111. A semiconductor device according to claim 101, wherein one of the first logical circuit and the second logical circuit is an AND circuit and the other is an OR circuit.

113. A semiconductor device according to claim 103, wherein an output terminal of the first logical circuit is connected to at least one inverter circuit.

115. A semiconductor device according to claim 103, wherein an output terminal of the second logical circuit is connected to at least one inverter circuit.

117. A display device using a semiconductor device according to claim 101.

119. A scanner using a semiconductor device according to claim 101.

121. A portable information terminal using a semiconductor device according to claim 101.