Display device and method for driving display device

• US 20040189627A1
• Filed: 03/05/2004
• Published: 09/30/2004
• Est. Priority Date: 03/05/2003
• Status: Active Grant

• Current Assignee: Solas OLED Limited (Atlantic IP Services Limited)
• Original Assignee: Casio Computer Company Limited
• Inventors: Shirasaki, Tomoyuki, Ozaki, Tsuyoshi, Takei, Manabu, Sato, Kazuhito
• Granted Patent: US 7,499,006 B2
• Time in Patent Office: Days
• US Class Current: 345/204
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2310/0267 Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 3/32 semiconductive, e.g. using light-emitting diodes [LED]

Abstract

A driver circuit for driving optical elements which is applied to a pixel driver circuit of the display device in this invention comprises a first current path with one end connected to the optical elements and the other end connected to a drive power supply; a second current path electrically connected to the first current path; a write-in control circuit which flows the write-in current having a predetermined current value in the direction of the other end side from the one end side of the first current path via the second current path; a charge storage circuit which stores the electric charge accompanying the write-in current flowing in the first current path; a drive control circuit which supplies the drive current to the optical elements via the first current path has a current value corresponding to the current value of the write-in current and drives these optical elements based on the electric charge stored in the charge storage circuit; and has a first timing operation in which the electric charge of the write-in current flowing in the first current path is stored by the write-in control circuit according to the write-in current in the charge storage circuit; and a second timing operation which supplies the drive current to the optical elements which does not overlap the time period of the first timing operation.

Claims

1. A drive circuit which drives the optical elements comprising:

a first current path with one end connected to one end of the optical elements and the other end connected to a drive power supply;

a second current path electrically connected to the first current path;

a write-in control circuit which flows the write-in current having a predetermined current value in the direction of the other end side from one end side of the first current path via the second current path;

a charge storage circuit which stores the electric charge accompanying the write-in current that flows in the first current path;

a drive control circuit which supplies the drive current to the optical elements via the first current path and drives these optical elements based on the electric charge stored up in the charge storage circuit.

2. The drive circuit according to claim 1, wherein the drive current has a current value corresponding to the current value of the write-in current.

3. The drive circuit according to claim 1, wherein the write-in control circuit has:

a first timing operation in which the electric charge of the write-in current flowing in the first current path is stored by the write-in control circuit according to the write-in current in the charge storage circuit; and

a second timing operation which supplies the drive current to the optical elements by the drive control circuit which does not over lap the time period of the first timing operation.

4. The drive circuit according to claim 1, wherein the signal current supplied in the second current path has a predetermined current value and the write-in current has a current value according to the value of the signal current.

5. The drive circuit according to claim 1, wherein the write-in control circuit further comprises:

a third current path provided between the first current path and the second current path; and

a current control circuit which controls the inflow of the write-in current to the first current path provided in the third current path;

wherein the write-in current flows in the first current path from the second current path via the third current path.

6. The drive circuit according to claim 1, wherein the drive control circuit comprises a first switching element which is provided in the first current path and controls the current value of the drive current;

and the charge storage circuit comprises a capacitative element provided at least between the first switching element and the first current path.

7. The drive circuit according to claim 6, wherein the write-in control circuit comprises a second switching element which controls operation of the first switching element.

8. The drive circuit according to claim 7, wherein the charge storage means includes the capacitative element and parasitic capacitance provided between the first switching element and the second switching element.

9. The drive circuit according to claim 8, wherein the capacitance value of the capacitative element in the charge storage means is set up to become lower than the parasitic capacitance.

10. The drive circuit according to claim 7, wherein the write-in control circuit further comprises a third current path connected and provided between the first current path and the second current path;

and the write-in current flows from the second current path to the first current path via the third current path.

11. The drive circuit according to claim 10, wherein the write-in control circuit comprises a current control circuit which is provided in the third current path and controls inflow of the write-in current to the first current path.

12. The drive circuit according to claim 11, wherein the current control circuit comprises a third switching element provided in the third current path which controls the current flow into the third current path.

13. The drive circuit according to claim 12, wherein the first through third switching elements are constituted by Thin-Film Transistors consisting of n-channel type amorphous silicon.

14. The drive circuit according to claim 1, wherein the optical elements on other ends are connected to a constant voltage regulate power source having predetermined electric potential;

_the electric potential changes to a forward-bias condition when one end of these optical elements is lower than the electric potential of the constant voltage regulate power source; and

the electric potential changes to a reverse-bias condition when one end of these optical elements is higher than the electric potential of the constant voltage regulate power source.

15. The drive circuit according to claim 14, wherein the electric potential of the drive power supply, the electric potential of the end of the first current path is set as the first electric potential accordingly to become higher than the electric potential of the constant voltage regulate power source in the first timing operation which flows the write-in current to the first current path in the write-in control circuit and changes the optical elements to a reverse-bias condition;

and in the electric potential of the drive power supply, the electric potential of the end of the first current path is set as the second electric potential accordingly to become lower than the electric potential of the constant voltage regulate power source in the second timing operation which flows the drive current in the drive control circuit to the optical elements and changes the optical elements to a forward-bias condition.

16. The drive circuit according to claim 1, wherein the optical elements have current control type light emitting devices which perform luminescent operation by predetermined luminosity gradation according to the current value of the drive current.

17. The drive circuit according to claim 16, wherein the light emitting devices are organic electroluminescent devices.

18. A display device which displays image information comprising:

a display panel which comprises at least a plurality of display pixels arranged in a matrix form comprises the optical elements and a pixel driver circuit which control operation of these optical elements, the selection lines where the selection signal is applied which selects each of the display pixels one line at a time, and the data lines where the signal current is supplied which has a current value according to the display signal;

the pixel driver circuit comprising;

a first current path with one end connected to one end of the optical elements and the other end connected to the drive power supply;

a second current path corresponding to a section of the data lines;

a write-in control circuit which flows the write-in current in the direction of the other end side from one end side of the first current path via the second current path which has a current value according to the signal current;

a charge storage circuit which stores the electric charge accompanying the write-in current which flows in the first current path; and

a drive control circuit which supplies the drive current to the optical elements via the first current path and drives these optical elements based on the electric charge stored up in the charge storage circuit.

19. The display device according to claim 18, wherein the drive current in the pixel drive circuit has a current value corresponding to the current value of the write-in current.

20. The display device according to claim 18, further comprises:

a scanning driver circuit which applies the selection signal to the selection lines; and

a signal driver circuit which flows the signal current to the data lines.

21. The display device according to claim 18, wherein pixel driver circuit has:

a first timing operation in which the electric charge of the write-in current flowing in the first current path is stored by the write-in control circuit according to the write-in current in the charge storage circuit; and

a second timing operation which supplies the drive current to the optical elements by the drive control circuit which does not overlap the time period of the first timing operation.

22. The display device according to claim 18, wherein the write-in control circuit in the pixel driver circuit further comprises:

a third current path provided between the first current path and the second current path; and

a current control circuit which controls the inflow of the write-in current to the first current path provided in the third current path;

wherein the write-in current flows in the first current path from the second current path via the third current path.

23. The display device according to claim 18, wherein the drive control circuit in the pixel driver circuit comprises a first switching element which is provided in the first current path and controls the current value of the drive current;

and the charge storage circuit comprises a capacitative element provided at least between the first switching element and the first current path.

24. The display device according to claim 23, wherein the write-in control circuit in the pixel driver circuit comprises a second switching element which controls operation of the first switching element.

25. The display device according to claim 24, wherein the charge storage means in the pixel driver circuit includes the capacitative element and parasitic capacitance provided between the first switching element and the second switching element.

26. The display device according to claim 25, wherein the capacitance value of the capacitative element in the charge storage means is set up to become lower than the parasitic capacitance.

27. The display device according to claim 24, wherein the write-in control circuit in the pixel driver circuit further comprises a third current path connected and provided between the first current path and the second current path;

and the write-in current flows from the second current path to the first current path via the third current path.

28. The display device according to claim 27, wherein the write-in control circuit in the pixel driver circuit comprises a current control circuit which controls inflow of the write-in current to the first current path.

29. The display device according to claim 28, wherein the current control circuit comprises a third switching element provided in the third current path which controls the current flow into the third current path.

30. The display device according to claim 29, wherein the first through third switching elements are constituted by Thin-Film Transistors consisting of n-channel type amorphous silicon.

31. The display device according to claim 18, wherein the optical elements on other ends are connected to a constant voltage regulate power source having predetermined electric potential;

the electric potential changes to a forward-bias condition when one end of these optical elements is lower than the electric potential of the constant voltage regulate power source; and

the electric potential changes to a reverse-bias condition when one end of these optical elements is higher than the electric potential of the constant voltage regulate power source.

32. The display device according to claim 31, wherein the write-in control circuit in the pixel driver circuit the electric potential of the drive power supply, the electric potential of the end of the first current path is set as the first electric potential accordingly to become higher than the electric potential of the constant voltage regulate power source in the first timing operation which flows the write-in current to the first current path and changes the optical elements to a reverse-bias condition;

and in the electric potential of the drive power supply, the electric potential of the end of the first current path is set as the second electric potential accordingly to become lower than the electric potential of the constant voltage regulate power source in the second timing operation which flows the drive current to the optical elements and changes the optical elements to a forward-bias condition.

33. The display device according to claim 18, wherein the optical elements have current control type light emitting devices which perform luminescent operation by predetermined luminosity gradation according to the current value of the drive current.

34. The display device according to claim 33, wherein the light emitting devices are organic electroluminescent devices.

35. The display device according to claim 34, wherein the organic electroluminescent devices in the pixel driver circuit have a top anode type device structure.

36. A drive method of the display device which displays image information comprising:

the display device comprising a display panel which comprises at least a plurality of display pixels arranged in a matrix form comprises the optical elements and a pixel driver circuit which control the operation of these optical elements;

in the pixel driver circuit, during the selection period of each of the display pixels of each line of the display panel, the write-in current flows in the direction of the other end side from one end side of the current path by way of one end connected to the optical elements and the other end to predetermined electric potential which has a current value according to the display signal;

the electric charge accompanying the write-in current is stored in the capacitative element attached to the current path; and

during the non-selection period of each of the display pixels of each line, the drive current is supplied to the optical elements via the current path according to the electric charge stored in the capacitative element.

37. The drive method of the display device according to claim 36, wherein the drive current in the pixel driver circuit has a current value corresponding to the current value of the write-in current.

38. The drive method of the display device according to claim 36, wherein during the selection period of each of the display pixels, the optical elements are set in a non-operational state by shifting the optical elements into a reverse-bias condition;

and during the non-selection period of each of the display pixels, the optical elements are set in an operational state by shifting the optical elements into a forward-bias condition.

39. The drive method of the display device according to claim 36, wherein the optical elements have current control type light emitting devices which perform luminescent operation by predetermined luminosity gradation according to the current value of the drive current.

40. The drive method of the display device according to claim 39, wherein the light emitting devices are organic electroluminescent devices.