Image processing device and method

• US 20040196290A1
• Filed: 03/22/2004
• Published: 10/07/2004
• Est. Priority Date: 12/12/2001
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Satoh, Jin
• Granted Patent: US 7,437,021 B2
• Time in Patent Office: Days
• US Class Current: 345/505
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G06T 15/04 Texture mapping

Abstract

An image processing apparatus and method which can achieve a reduction in size of the crossbar circuit and achieve a higher speed of processing, which perform DDA processing (ST11), then read out texture data from a memory (ST12), perform sub-word reallocation processing (ST13), then perform texture-filtering (ST14), then globally distribute data by the crossbar circuit 13 to a first operation processing element of each processing module (ST15), then perform processing at the pixel level, specifically use the texture data after filtering and the various types of data after rasterization to perform operations by pixel units and draw the pixel data passing the various types of tests in the processing at the pixel level to a frame buffer on a memory module (ST16).

Claims

1. An image processing apparatus in which a plurality of processing modules share processing data to perform parallel processing, wherein:

the plurality of processing modules each comprise;

a memory module storing at least data relating to filtering,

a processing circuit for obtaining data for filtering and performing assigned processing determined in advance by corresponding memory interleaving based on the processing data,

a first operation processing element for performing operation processing in pixel units based on assigned processing data and data after filtering obtained at said processing circuit, and

a second operation processing element for performing filtering based on the data for filtering obtained by said processing circuit and the data relating to filtering stored in said memory module and receiving operation processing data from said first operation processing element, then drawing the operation processed data to the memory module and

further comprises a crossbar circuit which is a global bus for connecting a plurality of first operation processing elements and a plurality of second operation processing elements of said processing modules, supplying data for filtering obtained by said processing circuit in each processing module to a second operation processing element in the same processing module, supplying data after filtering from a second operation processing element in each processing module to a first operation processing element in a processing module corresponding to the processing, and supplying the operation processing data from the first operation processing element to the second operation processing element.

2. An image processing apparatus as set forth in claim 1, wherein the processing circuit of each processing module comprises a means for adjusting time so that the processing time of the assigned data becomes equal to time when the data after filtering is supplied to the first operation processing element.

3. An image processing apparatus as set forth in claim 1, further comprising a setup circuit for performing an operation on the vertex data of a primitive, setting up one primitive, and outputting assigned data to the processing circuits of the processing modules.

4. An image processing apparatus as set forth in claim 1, wherein the processing requiring the filtering is processing relating to texture.

5. An image processing apparatus as set forth in claim 1, wherein said parallel processing is parallel processing at the pixel level.

6. An image processing method in which a plurality of processing modules share processing data to perform parallel processing;

comprising steps of;

obtaining data for filtering and performing assigned process determined in advance by corresponding memory interleaving based on the processing data in each processing module;

performing filtering based on the obtained data for filtering and data relating to filtering stored in a memory module;

supplying data after filtering in each processing module, through a global bus, to a predetermined processing module; and

performing operation processing in pixel unit based on the obtained assigned processing data and the data after filtering, and drawing the operation processed data to said memory module, in a processing module receiving the data after filtering.

7. An image processing method as set forth in claim 6, further comprising a step of adjusting each processing module time so that processing time of the assigned data becomes equal to time when the data after filtering is supplied.

8. An image processing method as set forth in claim 6, wherein the processing requiring the filtering is processing relating to texture.

9. An image processing method as set forth in claim 6, wherein the parallel processing is parallel processing at the pixel level.