Semiconductor device having silicide thin film and method of forming the same

• US 20040198032A1
• Filed: 04/21/2004
• Published: 10/07/2004
• Est. Priority Date: 03/19/2001
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kwon, Hyung-Shin, Joo, Joon-Yong, Kim, Sung-Bong, Koh, Kwang-Ok
• Granted Patent: US 7,385,260 B2
• Time in Patent Office: Days
• US Class Current: 438/592
• CPC Class Codes: H01L 21/28052 the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer formed by metal ion implantation H01L21/28044
• CPC Class Codes: H01L 21/28518 the conductive layers comprising silicides H01L21/28537 takes precedence
• CPC Class Codes: H01L 29/665 using self aligned silicidation, i.e. salicide formation of conductive layers comprising silicides H01L21/28518
• CPC Class Codes: H01L 29/66507 providing different silicide thicknesses on the gate and on source or drain
• CPC Class Codes: H01L 29/6653 using the removal of at least part of spacer, e.g. disposable spacer
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate

Abstract

The present invention provides a semiconductor device having a silicide thin film and method of forming the same. A semiconductor device comprises a gate insulation layer formed on an active region of a semiconductor substrate. A gate electrode is formed on the gate insulation layer. An impurity region is formed in the active region adjacent the gate electrode. A silicide thin film such as a cobalt silicide thin film is formed to a thickness of less than approximately 200 Å in the impurity region.

Claims

1. A semiconductor device comprising:

a gate insulation layer formed on an active region of a semiconductor substrate,

a gate electrode formed on the gate insulation layer;

an impurity region in the active region adjacent the gate electrode; and

a cobalt silicide thin film having a thickness of less than approximately 200 Å

in the impurity region.

2. The semiconductor device of claim 1, further comprising a metal silicide layer formed on the gate electrode.

3. The device according to claim 2, wherein said metal silicide layer is a tungsten silicide layer.

4. The device according to claim 2, wherein said metal silicide layer is a cobalt silicide layer formed to a thickness greater than said cobalt silicide thin film.

5. The device according to claim 2,

wherein said metal silicide layer is a cobalt silicide film formed on an upper surface and upper portions of sidewalls of said gate electrode, and

wherein sidewalls of said gate electrode on which said cobalt silicide film is not formed are covered with insulating spacers.

6. The device according to claim 1,

wherein said gate electrode has insulation spacers formed on side walls thereof adjacent to said impurity region;

and

wherein said cobalt silicide thin film is formed in said active region not covered with said spacers and said gate electrode.

7. The device according to claim 1, wherein a thickness of said cobalt silicide thin film is within a range of 50 to 150 Ø

.

8. The device according to claim 1, further comprising:

a silicon oxynitride layer disposed between said cobalt silicide thin film and an interlayer insulation layer formed over said cobalt silicide thin film.

9. A semiconductor device comprising:

a gate insulation layer formed on an active region of a semiconductor substrate,

a gate electrode formed on the gate insulation layer;

an impurity region formed in the active region adjacent the gate electrode; and

a silicide thin film having a thickness of less than approximately 200 Å

in the impurity region.

10. The semiconductor device of claim 9, wherein the silicide thin film is a cobalt silicide thin film.