Direct application voltage variable material, components thereof and devices employing same

• US 20040201941A1
• Filed: 12/23/2003
• Published: 10/14/2004
• Est. Priority Date: 04/08/2002
• Status: Active Grant

• Current Assignee: Littelfuse Incorporated
• Original Assignee: Littelfuse Incorporated
• Inventors: Vyas, Tushar, Whitney, Stephen J., Harris, Edwin James
• Granted Patent: US 7,132,922 B2
• Time in Patent Office: Days
• US Class Current: 361/127
• CPC Class Codes: H01C 17/06513 characterised by the resistive component
• CPC Class Codes: H01C 17/06553 composed of a combination of metals and oxides
• CPC Class Codes: H01C 17/0656 composed of silicides H01C17/0652 takes precedence
• CPC Class Codes: H01L 23/62 Protection against overvoltage, e.g. fuses, shunts
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12044 OLED
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H02H 9/044 Physical layout, materials not provided for elsewhere varistors H01C7/12; spark-gaps H01T; Ovshinsky devices H10N70/00
• CPC Class Codes: H05K 1/0257 Overvoltage protection
• CPC Class Codes: H05K 1/0298 Multilayer circuits
• CPC Class Codes: H05K 1/167 incorporating printed resistors
• CPC Class Codes: H05K 2201/0224 Conductive particles having an insulating coating
• CPC Class Codes: H05K 2201/0272 Mixed conductive particles, i.e. using different conductive particles, e.g. differing in shape
• CPC Class Codes: H05K 2201/0738 Use of voltage responsive materials, e.g. voltage switchable dielectric or varistor materials

Abstract

A voltage variable material (“VVM”) including an insulative binder that is formulated to intrinsically adhere to conductive and non-conductive surfaces is provided. The binder and thus the VVM is self-curable and applicable in a spreadable form that dries before use. The binder eliminates the need to place the VVM in a separate device or to provide separate printed circuit board pads on which to electrically connect the VVM. The binder and thus the VVM can be directly applied to many different types of substrates, such as a rigid (FR-4) laminate, a polyimide or a polymer. The VVM can also be directly applied to different types of substrates that are placed inside a device. In one embodiment, the VVM includes doped semiconductive particles having a core, such which can be silicon, and an inert coating, which can be an oxide. The particles are mixed in the binder with conductive particles.

Claims

1. A composition for providing protection against electrical overstress comprising:

an insulating binder;

semiconductor particles with a doped core and a coating maintained on the core, the semiconductor particles held in the binder; and

conductive particles held in the binder.

2. The composition of claim 1, wherein the insulating binder includes a polymer resin.

3. The composition of claim 1, wherein the doped core includes silicon and a dopant material.

4. The composition of claim 3, wherein the dopant material includes at least one component selected from the group consisting of:

antimony, arsenic, phosphorous and boron.

5. The composition of claim 1, wherein the doped core has an average size of about five microns to about 100 microns.

6. The composition of claim 1, wherein the coating has an average thickness of about 100 to 10,000 Angstroms.

7. The composition of claim 1, wherein the coating includes at least one material selected from the group consisting of:

silicon dioxide, epitaxial silicon and glass.

8. The composition of claim 1, wherein the conductive particles consist essentially of a single material.

9. The composition of claim 1, wherein the conductive particles include an oxide coating.

10. The composition of claim 1, wherein the conductive particles include at least one material selected from the group consisting of:

aluminum, brass, carbon black, copper graphite, gold, iron, nickel, silver stainless steel, tin, zinc and any combination thereof.

11. The composition of claim 1, wherein the conductive particles have an average size of about five microns to about fifty microns.

12. The composition of claim 1, which is configured and arranged to be applied directly to a use without being encapsulated in a device.

13. The composition of claim 1, which is configured and arranged to be provided in a device.

14. The composition of claim 1, which includes at least one additional type of particle selected from the group consisting of:

an insulative particle, a semiconductive particle and tungsten powder.

15. A composition for protecting against electrical overstress comprising:

an insulating binder;

doped semiconductive particles held in the binder; and

conductive particles held in the binder, the conductive particles consisting essentially of a single material, and wherein the binder, the semiconductive particles and the conductive particles are configured and arranged to be laminated into an electrode gap.

16. The composition of claim 15, wherein the doped semiconductive particles include a core and a shell.

17. The composition of claim 15, wherein the conductive particles include at least one material selected from the group consisting of:

aluminum, brass, carbon black, copper graphite, gold, iron, nickel, silver stainless steel, tin, zinc and any combination thereof.

18. The composition of claim 15, which is configured and arranged to be applied directly to a use, without being encapsulated in a device.

19. The composition of claim 15, which is configured and arranged to be provided in a device.

20. The composition of claim 15, which includes at least one additional type of particle selected from the group consisting of:

an insulative particle, a semiconductive particle and tungsten powder.

21. A particle for use in an electrical overstress composition comprising:

a doped semiconductive core; and

an inert coating surrounding the core.

22. The particle of claim 21, wherein the doped core includes silicon and a dopant material.

23. The particle of claim 22, wherein the dopant material includes at least one component selected from the group consisting of:

antimony, arsenic, phosphorous and boron.

24. The particle of claim 21, wherein the doped core has an average size of about five microns to about 100 microns.

25. The particle of claim 21, wherein the coating has an average thickness of about 100 to 10,000 Angstroms.

26. The particle of claim 21, wherein the coating includes at least one material selected from the group consisting of:

silicon dioxide, epitaxial silicon and glass.

27. A particle for use in an electrical overstress composition comprising:

an inner silicon portion; and

an outer portion that includes a material selected from the group consisting of;

silicon dioxide, epitaxial silicon and glass.

28. The particle of claim 27, wherein the outer portion is grown via a heat controlled environment.

29. The particle of claim 27, wherein the outer portion is applied using a fluidized plasma reactor.

30. A method of making an electrical overstress composition comprising the steps of:

doping silicon to a desired resistivity;

subjecting the doped silicon to heat over a period of time to grow an oxide layer on the doped silicon; and

mixing the resulting silicon and oxide material with a binder.

31. The method of claim 30, which includes the step of preparing the insulative binder by dissolving a polymer in a solvent.

32. The method of claim 30, which includes the step of grinding the doped silicon to a suitable particle size.

33. The method of claim 30, which includes subjecting the doped silicon to a temperature of about 500°

C. to about 1500°

C.

34. The method of claim 30, which includes subjecting the doped silicon to heat over a period of about fifteen minutes to about three hours.

35. The method of claim 30, which includes subjecting the doped silicon to multiple heat and cool intervals.

36. The method of claim 35, which includes cooling the doped silicon under vacuum..

37. The method of claim 35, which includes mixing the resulting silicon and oxide materials in the binder together with at least one additional component selected from the group consisting of:

conductive particles, conductive core/shell particles, insulative particles, semiconductive particles and tungsten powder.