Low power dual processor architecture for multi mode devices

• US 20040204050A1
• Filed: 08/27/2002
• Published: 10/14/2004
• Est. Priority Date: 08/27/2002
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Ludwin, Albert S., Krishnan, Ranganathan, Gardner, William R.
• Granted Patent: US 7,450,963 B2
• Time in Patent Office: Days
• US Class Current: 455/556.1
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3293 by switching to a less power-consuming processor, e.g. sub-CPU
• CPC Class Codes: H04W 52/028 switching on or off only a part of the equipment circuit blocks
• CPC Class Codes: H04W 52/0287 changing the clock frequency of a controller in the equipment
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A mobile computing device with multiple modes, for example, wireless communication and personal computing, has an application processor and a communication processor. In the computing mode, the application processor is the master processor. In the communication mode, the application processor is deenergized to conserve battery power, with the communication processor functioning as the master processor by accessing the device'"'"'s peripheral bus using the memory interface of the communication processor.

Claims

1. A multi mode mobile device, comprising:

a housing holding a battery;

at least one communication processor configured to facilitate wireless communication using the device, the communication processor being supported on the housing and being powered at least in part by the battery; and

at least one application processor configured to execute at least one application, the application processor being supported on the housing and being powered at least in part by the battery,

wherein the device has at least a communication mode and a computing mode, and when the device is in the communication mode, a core of the application processor is not energized.

2. The device of claim 1, wherein the communication processor is associated with a memory bus communicating with one or more memory devices and the application processor is associated with a processor local bus (PLB), and the memory bus communicates with the PLB.

3. The device of claim 2, wherein the memory bus communicates with a PLB bridge processor to facilitate the communication processor functioning as a master of the PLB.

4. The device of claim 3, wherein the communication processor accesses peripheral hardware associated with the PLB.

5. The device of claim 1, further comprising a PLB bridge processor interposed between the memory bus and PLB.

6. The device of claim 1, wherein the application processor is energized when the device is in the computing mode.

7. The device of claim 2, further comprising at least one peripheral hardware component connected to the PLB.

8. The device of claim 7, wherein the peripheral hardware component is at least one of:

a touch panel controller, and a storage interface.

9. A multi mode mobile device, comprising:

a housing holding a battery;

at least one communication processor configured to facilitate wireless communication using the device, the communication processor being supported on the housing and being powered at least in part by the battery; and

at least one application processor configured to execute at least one application, the application processor being supported on the housing and being powered at least in part by the battery,

wherein the device has at least a communication mode and a computing mode, and when the device is in the communication mode, the communication processor functions as a master processor.

10. The device of claim 9, wherein when the communication processor functions as a master processor, it at least controls at least one peripheral hardware component on the device.

11. The device of claim 9, wherein when the device is in the communication mode, the application processor is not energized.

12. The device of claim 9, wherein the communication processor is associated with a memory bus communicating with one or more memory devices and the application processor is associated with a processor local bus (PLB), and the memory bus communicates with the PLB.

13. The device of claim 12, wherein the memory bus communicates with the PLB using a PLB bridge processor to facilitate the communication processor functioning as a master of the PLB.

14. The device of claim 13, wherein the communication processor accesses peripheral hardware associated with the PLB.

15. The device of claim 14, further comprising a PLB bridge processor interposed between the memory bus and PLB.

16. The device of claim 11, wherein the application processor is energized when the device is in the computing mode.

17. The device of claim 10, wherein the peripheral hardware component communicates with the PLB.

18. A method for effecting mobile computing, comprising:

supporting an application processor and a communication processor in a housing; and

selectively establishing one of the processors as a master processor based on a mode of operation.

19. The method of claim 18, wherein a processor is a master processor at least in part based on its control of at least one peripheral hardware component supported on the housing.

20. The method of claim 19, comprising undertaking wireless communication using the communication processor in a communication mode with the application processor being deenergized and the communication processor being a master processor.

21. The method of claim 19, comprising executing at least one application using the application processor in an application mode, wherein the application processor is a master processor and the communication processor is a peripheral processor.

22. The method of claim 18, further comprising energizing at least one processor using at least one battery.

23. The method of claim 18, comprising establishing communication between the communication processor and a bus of the application processor using a memory interface of the communication processor.

24. The method of claim 18, further comprising disposing a PLB bridge processor on the housing to undertake the act of selectively establishing.

25. A system for effecting mobile computing, comprising:

a housing;

application processing means for executing logic, the application processing means being mounted on the housing;

communication processing means for executing logic, the communication processing means being mounted on the housing; and

means for selectively establishing one of the processoring means as a master processor based on a mode of operation.

26. The system of claim 25, wherein a processing means is a master processor at least in part based on its control of at least one peripheral hardware component supported on the housing.

27. The system of claim 26, comprising means for undertaking wireless communication using the communication processing means in a communication mode with the application processing means being deenergized and the communication processing means being a master processor.

28. The system of claim 26, comprising means for executing at least one application using the application processing means in an application mode, wherein the application processing means is a master processor and the communication processing means is a peripheral processor.

29. The system of claim 25, further comprising means for energizing at least one processor using at least one battery.

30. The system of claim 25, comprising means for establishing communication between the communication processing means and a bus of the application processing means using a memory interface of the communication processing means.