System and method for scheduling message transmission and processing in a digital data network
First Claim
1. A transmit scheduler for use in scheduling transmission of message packets by a source device over a network, each message packet being associated with one of a plurality of virtual circuits, the transmit scheduler comprising:
- A. a virtual circuit task list configured to identify virtual circuits for which message packets are to be transmitted; and
B. a transmit task control configured to sequence through the virtual circuit task list to identify successive virtual circuits for which message packets are to be transmitted and, for each identified virtual circuit, to enable data to be obtained for transmission by said transmitter in a respective message packet, thereby to facilitate transmission of message packets by the transmitter so that messages are transmitted in a round-robin manner as among ones of the virtual circuits for which the device is the source device;
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Accused Products
Abstract
A system includes a plurality of computers interconnected by a network including one or more switching nodes. The computers transfer messages over virtual circuits established thereamong. A computer, as a source computer for one or more virtual circuit(s), schedules transmission of messages on a round-robin basis as among the virtual circuits for which it is source computer. Each switching node which forms part of a path for respective virtual circuits also forwards messages for virtual circuits in a round-robin manner, and, a computer, as a destination computer for one or more virtual circuit(s), schedules processing of received messages in a round-robin manner. Round-robin transmission, forwarding and processing at the destination provides a degree of fairness in message transmission as among the virtual circuits established over the network. In addition, messages are transmitted in one or more cells, with the round-robin transmission being on a cell basis, so as to reduce delays which may occur for short messages if a long messages were transmitted in full for one virtual circuit before beginning transmission of a short message for another virtual circuit. For each virtual circuit, the destination computer and each switching node along the path for the virtual circuit can generate a virtual circuit flow control message for transmission to the source computer to temporarily limit transmission over the virtual circuit if the amount of resources being taken up by messages for the virtual circuit exceeds predetermined thresholds, further providing fairness as among the virtual circuits. In addition, each switching node or computer can generate link flow control messages for transmission to neighboring devices in the network to temporarily limit transmission thereto if the amount of resources taken up by all virtual circuits exceeds predetermined thresholds, so as to reduce the likelihood of message loss.
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Citations
11 Claims
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1. A transmit scheduler for use in scheduling transmission of message packets by a source device over a network, each message packet being associated with one of a plurality of virtual circuits, the transmit scheduler comprising:
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A. a virtual circuit task list configured to identify virtual circuits for which message packets are to be transmitted; and
B. a transmit task control configured to sequence through the virtual circuit task list to identify successive virtual circuits for which message packets are to be transmitted and, for each identified virtual circuit, to enable data to be obtained for transmission by said transmitter in a respective message packet, thereby to facilitate transmission of message packets by the transmitter so that messages are transmitted in a round-robin manner as among ones of the virtual circuits for which the device is the source device;
- View Dependent Claims (2, 3, 4, 5, 6)
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7. A receive scheduler for use in scheduling processing in connection with message packets received by a destination device over a network, each message packet being associated with one of a plurality of virtual circuits, the receive scheduler comprising:
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A. a virtual circuit task list configured to identify virtual circuits for which message packets have been received; and
B. a receive task control configured to sequence through the virtual circuit task list to identify successive virtual circuits for which message packets have been received, and, for each identified virtual circuit, to enable the transfer of data associated with said message packets to a data store for use by a receive host in a round-robin manner. - View Dependent Claims (8, 9, 10, 11)
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Specification