Method for adaptive control of DRAM refresh interval

• US 20040210710A1
• Filed: 01/26/2004
• Published: 10/21/2004
• Est. Priority Date: 04/17/2003
• Status: Abandoned Application

• Current Assignee: Winbond Electronics Corporation
• Original Assignee: Winbond Electronics Corporation
• Inventors: Su, Yuan-Mou
• Application Number:
  US10/763,250
• Publication Number:
  US 20040210710A1
• Time in Patent Office: Days
• US Class Current: 711/106
• CPC Class Codes: G11C 11/406 Management or control of the refreshing or charge-regeneration cycles
• CPC Class Codes: G11C 2211/4061 Calibration or ate or cycle tuning
• CPC Class Codes: G11C 2211/4068 Voltage or leakage in refresh operations

Abstract

The present invention relates to a method for finding the appropriate refresh interval applied for DRAM of the present invent, comprising, detecting startup, providing a clock pulse as a refresh interval, DRAM self-testing of a plurality of memory cells with the provided refresh interval, modifying the refresh interval and repeating the above steps to find the longest refresh interval as determined by the DRAM self-testing procedure, and using the determined appropriate refresh interval to refresh the DRAM. Therefore, the appropriate refresh interval, found form the method of the present invention, could be adjusted with the DRAM chip for saving the power with refresh.

Claims

1. A method of determining an appropriate refresh interval for a DRAM chip, the method comprising:

detecting device startup;

providing a clock pulse as a refresh interval;

self-testing a plurality of memory cells using the refresh interval;

modifying the refresh interval and repeating the above steps;

determining the longest refresh interval as a result of the self-testing procedure; and

using the appropriate refresh interval, defined by the longest refresh interval, to refresh the DRAM.

2. The method of determining the appropriate refresh interval as claimed in claim 1, wherein the self-testing comprises:

writing an original test code to a plurality of DRAM memory cells;

refresh the DRAM memory cells several times by using the refresh clock;

comparing saved test code with the original test code, to determine the effectiveness of the refresh interval;

if the result of the comparison is equal, the system outputs a self-test success signal; and

if the result of the comparison is unequal, the system outputs a self-test failure signal.

3. The method of finding the appropriate refresh interval as claimed in claim 1, wherein the definition of the most appropriate refresh interval comprises:

the most appropriate refresh interval is the longest refresh interval plus a specific variable.