Edge arrangements for integrated circuit chips

• US 20040212047A1
• Filed: 04/22/2003
• Published: 10/28/2004
• Est. Priority Date: 04/22/2003
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: He, Jun, Joshi, Subhash M., Leavy, Tom P., Arcot, Binny
• Granted Patent: US 7,087,452 B2
• Time in Patent Office: Days
• US Class Current: 257/620
• CPC Class Codes: H01L 23/585 comprising conductive layers or plates or strips or rods or rings H01L23/60, H01L23/62, H01L23/64, H01L23/66 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A method is provided for forming microelectronic devices. This may include providing a wafer device having metallization layers, a plurality of integrated circuits and a channel area provided around each of the integrated circuits. Materials from within each channel area may be removed by etching or by laser to form an air gap around a perimeter of each integrated circuit. Each air gap may prevent cracking and/or delamination problems caused by a subsequent dicing of the wafer device by a wafer saw into a plurality of devices.

Claims

1. A method comprising:

providing a wafer device having metallization layers, at least two active areas and a channel area between the two active areas; and

removing materials from within the channel area to form an air gap between the two active areas.

2. The method of claim 1, further comprising providing a mask over the metallization layers and the channel area, the mask including an opening positioned over at least portions of the channel area, and removing includes etching the materials within the channel area corresponding to the opening of the mask.

3. The method of claim 1, wherein providing the wafer device comprises forming the channel area of metal materials, and removing comprises removing the metal materials from within the channel area.

4. The method of claim 1, wherein providing the wafer device comprises forming the channel area of dielectric materials, and removing comprises removing the dielectric materials from within the channel area.

5. The method of claim 1, wherein providing the wafer device includes forming the channel area having metal walls on sides of dielectric materials within the channel area, and removing comprises removing the dielectric materials from within the channel area and such that the metal walls remain.

6. The method of claim 1, wherein providing the wafer device includes forming the channel area having a metal base and dielectric materials within the channel area, and removing comprises removing the dielectric materials from within the channel area and such that the metal base and metal walls remains.

7. The method of claim 1, further comprising cutting through the wafer device within the air gap.

8. The method of claim 7, wherein cutting through the wafer device comprises placing a wafer saw within the air gap and cutting through the wafer device.

9. The method of claim 8, wherein cutting through the wafer device occurs after forming the air gap.

10. The method of claim 1, wherein providing the wafer device includes forming the channel area around a perimeter of one of the two active areas, and the removing forms the air gap around the perimeter of the one of the two active areas.

11. The method of claim 1, wherein the removing comprises selectively etching the materials within the channel area without etching walls of the channel area.

12. The method of claim 1, wherein the removing comprising laser ablating the materials within the channel area to form the air gap.

13. The method of claim 1, wherein providing the wafer device comprises forming the channel area of a pattern of metal features and dielectric features.

14. The method of claim 13, wherein the pattern of the metal features and the dielectric features is based on characteristics of a laser to remove the materials.

15. The method of claim 14, wherein the pattern of the metal features and the dielectric features is based on absorption and reflection characteristics of a laser beam.

16. The method of claim 15, wherein the removing comprises removing first materials from a first layer within the channel area, and removing second materials from a second layer within the channel area.

17. A method comprising:

providing a wafer device having a wafer, a first and second integrated circuit on the wafer and a channel area around the first integrated circuit; and

forming an air gap around the first integrated circuit based on the channel area.

18. The method of claim 17, wherein forming the air gap comprises providing a mask over the first integrated circuit and the channel area, the mask including an opening positioned over at least portions of the channel area, and etching materials within the channel area corresponding to the opening of the mask.

19. The method of claim 17, wherein providing the wafer device comprises forming the channel area of metal materials, and forming the air gap comprises removing the metal materials from within the channel area.

20. The method of claim 17, wherein providing the wafer device comprises forming the channel area of dielectric materials, and forming the air gap comprises removing the dielectric materials from within the channel area.

21. The method of claim 17, wherein providing the air gap includes forming the channel area having metal sidewalls on sides of dielectric materials, and forming the air gap comprises removing the dielectric materials from within the channel area and such that the metal sidewalls remain.

22. The method of claim 17, wherein providing the air gap includes forming the channel area having a metal base and dielectric materials within the channel area, and forming the air gap comprises removing the dielectric materials from within the channel area and such that the metal base remains.

23. The method of claim 17, further comprising cutting through the wafer device within the air gap.

24. The method of claim 23, wherein forming the air gap comprises laser ablating materials within the channel area.

25. The method of claim 24, wherein providing the wafer device comprises forming the channel area of a pattern of metal features and dielectric features.

26. The method of claim 25, wherein the pattern of the metal features and the dielectric features is based on characteristics of a laser to remove the features.

27. The method of claim 26, wherein the pattern of the metal features and the dielectric features are based on absorption and reflection characteristics of a laser beam.

28. The method of claim 17, wherein the forming the air gap comprises

removing first materials from a first layer within the channel area, and

removing second materials from a second layer within the channel area.

29. A die comprising:

an integrated circuit (IC) area;

a die cut on edges of the die; and

an air gap area provided between the die cut and the IC area.

30. The die of claim 29, further comprising a metal wall provided between the air gap area and the IC area.

31. The die of claim 30, wherein the metal wall is provided around an entire perimeter of the IC area.

32. The die of claim 30, further comprising a dielectric isolation zone provided between the metal wall and the IC area.

33. The die of claim 32, wherein the dielectric isolation zone is provided around an entire perimeter of the IC area.