Deposition oxide with improved oxygen bonding

• US 20040214365A1
• Filed: 03/15/2004
• Published: 10/28/2004
• Est. Priority Date: 11/14/2002
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Laboratories of America Incorporated (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Joshi, Pooran Chandra
• Granted Patent: US 7,122,487 B2
• Time in Patent Office: Days
• US Class Current: 438/48
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/66772 Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates H01L29/66666 takes precedence; thin film FinFETs H01L29/66795

Abstract

A deposition oxide interface with improved oxygen bonding and a method for bonding oxygen in an oxide layer are provided. The method includes depositing an M oxide layer where M is a first element selected from a group including elements chemically defined as a solid and having an oxidation state in a range of +2 to +5, plasma oxidizing the M oxide layer at a temperature of less than 400° C. using a high density plasma source, and in response to plasma oxidizing the M oxide layer, improving M-oxygen bonding in the M oxide layer. The plasma oxidation process diffuses excited oxygen radicals into the oxide layer. The plasma oxidation is performed at specified parameters including temperature, power density, pressure, process gas composition, and process gas flow. In some aspects of the method, M is silicon, and the oxide interface is incorporated into a thin film transistor.

Claims

1. A method for bonding oxygen in an oxide layer, the method comprising:

depositing an M oxide layer where M is a first element selected from a group including elements chemically defined as a solid and having an oxidation state in a range of +2 to +5;

plasma oxidizing the M oxide layer at a temperature of less than 400°

C. using a high density (HD) plasma source; and

,

in response to plasma oxidizing the M oxide layer, improving M-oxygen (M—

O) bonding in the M oxide layer.

2. The method of claim 1 wherein plasma oxidizing the M oxide layer includes diffusing excited oxygen radicals into the M oxide layer.

3. The method of claim 2 wherein improving M—

O bonding in the M oxide layer includes bonding oxygen radicals to element M in the M oxide layer.

4. The method of claim 3 wherein depositing an M oxide layer includes depositing a first M oxide molecule with a first number of bonded oxygen atoms;

wherein bonding oxygen radicals to M atoms in the M oxide layer includes bonding oxygen radicals to the first M oxide molecule; and

,

wherein improving M—

O bonding in the M oxide layer includes increasing the number of bonded oxygen atoms in the first M oxide molecule to a second number greater than the first number.

5. The method of claim 3 wherein bonding oxygen radicals to M atoms in the M oxide layer includes bonding oxygen radicals to dangling M bonds.

6. The method of claim 3 wherein diffusing excited oxygen radicals into the M oxide layer includes breaking process-induced impurity bonds attached to a first M atom;

and,

wherein bonding oxygen radicals to M atoms in the M oxide layer includes bonding oxygen radicals to the first M atom.

7. The method of claim 2 wherein depositing an M oxide layer includes depositing an M oxide molecule with M—

O bonds in a non-stoichometric energy state; and

, wherein improving M—

O bonding in the M oxide layer includes converting non-stoichiometric M—

O bonds to stoichiometric M—

O bonds.

8. The method of claim 2 wherein plasma oxidizing the M oxide layer at a temperature of less than 400°

C. using an HD plasma source includes using an inductively coupled plasma (ICP) source.

9. The method of claim 8 wherein using an ICP source includes inductively coupling plasma:

in a range of 13.56 to 300 megahertz (MHz) with a power density up to 10 watts per square centimeter (W/cm²);

at a pressure of up to 500 milliTorr (mTorr);

with a mixture of inert gas and oxygen in a ratio of approximately 10;

1 to 200;

1; and

,

with a total gas flow of approximately 50 to 200 standard cubic centimeters per minute (sccm).

10. The method of claim 9 wherein inductively coupling plasma includes using a low frequency power source at 50 kilohertz (KHz) to 13.56 MHz with a power density of 0.1 to 1.6 W/cm².

11. The method of claim 9 wherein inductively coupling plasma with a mixture of inert gas and oxygen includes mixing oxygen with inert gas selected from the group including helium, argon, and krypton.

12. The method of claim 9 wherein depositing an M oxide layer includes depositing an M oxide layer where M is silicon.

13. The method of claim 12 further comprising:

forming a silicon layer; and

,

wherein depositing an M oxide layer where M is silicon includes using an HD plasma enhanced chemical vapor deposition (HD-PECVD) process to deposit, overlying the silicon layer, the M oxide layer;

at a temperature of 150°

C.;

using a radio frequency (RF) power source at 13.56 MHz with a power density of 0.1 to 1.6 W/cm²;

at a pressure of 10 to 250 mTorr;

with a mixture of SiH₄, N₂O, and N₂ gases in a ratio of 5-25;

50-200;

10-100; and

,

with a refractive index of 1.44;

wherein inductively coupling plasma includes inductively coupling plasma at a temperature of 150°

C.;

using an RF power source at 13.56 MHz with a power density of 0.1 to 1.6 W/cm²; and

,

at a pressure of 10 to 500 mTorr; and

,

wherein improving M—

O bonding in the M oxide layer includes increasing the M oxide layer refractive index value to 1.46.

14. The method of claim 13 further comprising:

forming a transparent substrate layer; and

,

forming a diffusion barrier overlying the substrate layer and underlying the silicon layer; and

,

wherein forming a silicon layer includes forming transistor channel, source, and drain regions in the silicon layer;

wherein using an HD-PECVD process to deposit the M oxide layer includes depositing a gate dielectric layer overlying the silicon layer;

wherein inductively coupling plasma at a temperature of 150°

C. includes plasma oxidizing the gate dielectric layer; and

,

the method further comprising;

forming a gate electrode overlying the gate dielectric layer.

15. The method of claim 14 wherein using the HD-PECVD process to deposit a gate dielectric layer overlying the silicon layer includes depositing a gate dielectric layer with a thickness of 500 angstroms (Å

); and

,

wherein improving M—

O bonding in the M oxide layer includes, in the gate dielectric layer;

decreasing a fixed oxide charge density (N_f) from 26.0×

10¹¹ to 1.8×

10¹¹ per square centimeter (/cm²);

decreasing an interface trap concentration from 3.5×

10¹⁰ to 1.2×

10¹⁰ per square centimeter—

electron volt (/cm² eV);

decreasing a flat band voltage shift (V_FB) from −

7.5 to −

0.8 volts (V);

decreasing a leakage current density (J) from 1.8×

10<sup>−

7</sup> to 2.6×

10<sup>−

8</sup> amperes per square centimeter (A/cm²) at an applied electric field of 2 megavolts per centimeter (MV/cm);

increasing a breakdown field strength (EBD) from 6.8 to 7.2 MV/cm;

increasing an electric field strength (E) associated with a J of 1×

10<sup>−

8</sup> A/cm² from 4.3 to 6.4 Mv/ cm; and

,

maintaining a bias temperature shift (BTS) of less than 1 V under dual bias (±

2 MV/cm) temperature stress at 150°

C.

16. The method of claim 13 wherein forming a silicon layer includes forming a layer selected from the group including amorphous silicon, microcrystalline silicon, and polycrystalline silicon.

17. The method of claim 1 wherein depositing an M oxide layer where M is an element selected from a group including elements chemically defined as a solid and having an oxidation state in a range of +2 to +5 includes depositing an M oxide selected from the group including M binary oxides and M multi-component oxides.

18. The method of claim 1 wherein depositing an M oxide layer includes depositing an M oxide layer with a refractive index first value;

and,

wherein improving M—

O bonding in the M oxide layer includes increasing the refractive index first value.

19. The method of claim 1 wherein depositing an M oxide layer includes depositing an M oxide layer with a leakage current first value;

and,

wherein improving M—

O bonding in the M oxide layer includes decreasing the leakage current first value.

20. The method of claim 1 wherein plasma oxidizing the M oxide layer at a temperature of less than 400°

C. includes plasma oxidizing the M oxide layer at a temperature of less than 200°

C.

21. The method of claim 20 wherein plasma oxidizing the M oxide layer at a temperature of less than 200°

C. includes plasma oxidizing the M oxide layer at a temperature of less than 50°

C.

22. The method of claim 1 wherein depositing an M oxide layer includes depositing the M oxide layer at temperatures equal to and greater than 400°

C.

23. The method of claim 1 wherein depositing an M oxide layer includes depositing the M oxide layer at a temperature less than 400°

C.

24. The method of claim 1 wherein treating the substrate at a temperature of less than 400°

C. using an HD plasma source includes using an HD plasma source selected from the group including electron cyclotron resonance (ECR) plasma sources and cathode-coupled plasma sources.

25. A method for bonding oxygen in an oxide layer, the method comprising:

depositing an M oxide layer where M is an element selected from a group including elements chemically defined as a solid and having an oxidation state in a range of +2 to +5;

plasma oxidizing the M oxide layer at a temperature of less than 400°

C. using a transmission/transformer coupled plasma source; and

, in response to plasma oxidizing the M oxide layer, improving M—

O bonding in the M oxide layer.

26. An in-situ method for bonding oxygen to silicon in an oxide layer, the method comprising:

in a film processing chamber, depositing an M oxide layer where M is an element selected from a group including elements chemically defined as a solid and having an oxidation state in a range of +2 to +5;

leaving the M oxide layer in the film processing chamber, plasma oxidizing the M oxide layer at a temperature of less than 400°

C. using a high density (HD) plasma source; and

,

in response to plasma oxidizing the M oxide layer, improving M—

O bonding in the M oxide layer.

27. An oxide interface comprising:

a transparent substrate;

a silicon layer overlying the substrate; and

,

overlying the silicon layer, a deposition oxide layer with a refractive index of 1.46.

28. The oxide interface of claim 27 wherein the silicon layer is selected from the group including amorphous silicon, microcrystalline silicon, and polycrystalline silicon.

29. The oxide interface of claim 27 wherein the deposition oxide layer is selected from the group including silicon oxide and silicon oxynitride.

30. The oxide interface of claim 27 further comprising:

a diffusion barrier overlying the substrate and underlying the silicon layer; and

,

a gate electrode overlying the oxide layer;

wherein the silicon layer includes channel, source, and drain regions; and

,

wherein the oxide layer has;

a fixed oxide charge density (N_f) of 1.8×

10¹¹ per square centimeter (/cm²);

an interface trap concentration of 1.2×

10¹⁰ per square centimeter—

electron volt (/cm² eV);

a flat band voltage shift (V_FB) of −

0.8 volts (V);

a leakage current density (J) of 2.6×

10<sup>−

8</sup> amperes per square centimeter (A/cm²) at an applied electric field of 2 megavolts per centimeter (MV/cm);

a breakdown field strength (EBD) of 7.2 MV/cm;

an electric field strength (E) of 6.4 MV/cm associated with a J of 1×

10<sup>−

8</sup> A/cm²; and

,

a bias temperature shift (BTS) of less than 1V under dual bias (±

2 MV/cm) temperature stress at 150°

C.

31. A thin film transistor (TFT) comprising:

a transparent substrate;

a diffusion barrier overlying the transparent substrate;

a silicon layer with channel, source, and drain regions overlying the diffusion barrier;

overlying the silicon layer, a deposition oxide gate insulator layer with;

a refractive index of 1.46;

a fixed oxide charge density (N_f) of 1.8×

10¹¹ per square centimeter (/cm²);

an interface trap concentration of 1.2×

10¹⁰ per square centimeter—

electron volt (/cm² eV);

a flat band voltage shift (V_FB) of −

0.8 volts (V);

a leakage current density (J) of 2.6×

10<sup>−

8</sup> amperes per square centimeter (A/cm²) at an applied electric field of 2 megavolts per centimeter (MV/cm);

a breakdown field strength (EBD) of 7.2 MV/cm;

an electric field strength (E) of 6.4 MV/cm associated with a J of 1×

10<sup>−

8</sup> A/cm²; and

,

a bias temperature shift (BTS) of less than 1V under dual bias (±

2 MV/cm) temperature stress at 150°

C.; and

,

a gate electrode overlying the oxide gate insulator layer.