Systems and methods for dynamic power management of electronic devices

• US 20040215986A1
• Filed: 04/25/2003
• Published: 10/28/2004
• Est. Priority Date: 04/25/2003
• Status: Active Grant

• Current Assignee: ATI Technologies Incorporated (Advanced Micro Devices, Inc.)
• Original Assignee: ATI Technologies Incorporated (Advanced Micro Devices, Inc.)
• Inventors: Shakkarwar, Rajesh G.
• Granted Patent: US 7,392,411 B2
• Time in Patent Office: Days
• US Class Current: 713/300
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/3253 Power saving in bus
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Systems and methods for dynamic power management of electronic devices are disclosed. In one form, a system employing dynamic power management for electronic devices includes a central processing unit operable to process information via a communication bus. The system includes a clock generator and a voltage generator coupled to the processing unit and operably associated with the communication bus having multiple operating voltage levels. The clock generator and communication bus are operated at variable clock rates and voltage levels to ensure bandwidth requirements are satisfied for communicating and processing information. In this manner, power consumption of the system may be dynamically managed while providing sufficient bandwidth for the system.

Claims

1. A monitoring system for optimizing operating conditions during communication of information between electronic devices comprising:

a communication bus operable to communicate information; and

an operating characteristic associated with the communication bus and alterable in response to determining bandwidth to communicate the information via the communication bus.

2. The system of claim 1 further comprising a first variable reference voltage generator coupled to a control logic and operable to be altered to provide an operating voltage level of the communication bus.

3. The system of claim 2 further comprising a first variable clock generator operably associated with the communication bus and the control logic, the clock generator operable to provide a clock for the communication bus based on the determined bandwidth.

4. The system of claim 1 further comprising:

a first component coupled to a first portion of the communication bus and operable to communicate the information;

a second component coupled to a second portion of the communication bus; and

a bandwidth level associated with the first component, the second component, and the communication bus, the bandwidth level including an associated voltage level and clock to satisfy the bandwidth level.

5. The system of claim 1 further comprising an operating characteristic for each of the first component and the second component, the operating characteristics stored within a memory associated with the communication bus for determining a voltage level and a clock level to provide the bandwidth.

6. The system of claim 5 wherein the first component comprises a data controller unit and the second component comprises an IO device.

7. The system of claim 5 wherein the first component comprises a data controller and the second component comprises a graphics device.

8. The system of claim 5 wherein the first component comprises a graphics device module and the second component comprises a memory device.

9. The system of claim 1 wherein the operating characteristic includes a voltage level between 0.5 volts and 5.0 volts.

10. The system of claim 9 wherein the operating characteristic includes a first operating characteristic providing a clock having a frequency less than approximately 100 GHz and a second operating characteristic providing a clock having a frequency greater than approximately 33 MHz.

11. A method for altering operating characteristics of electronic devices during communicative periods of operation, the method comprising:

determining bandwidth needed to support communicating information between one or more electronic devices;

determining an operating characteristic of the at least one electronic device; and

altering the operating characteristic of the at least one electronic device to provide an operating level sufficient to provide the bandwidth.

12. The method of claim 11 further comprising the step of detecting a change in needed bandwidth needed to support communicating the information.

13. The method of claim 12 wherein altering the operating characteristic includes altering an operating voltage level and a clock associated with a communication bus operable to communicate the information.

14. The method of claim 13 further comprising:

detecting a coupling of a second electronic device to the communication bus;

determining the operating characteristics of the communication bus;

determining bandwidth needed to support both electronic devices; and

altering at least one of the operating characteristics of the communication bus to support the determined bandwidth.

15. The method of claim 11 further comprising:

accessing a file including an operating characteristics and status of the one or more electronic devices; and

determining bandwidth based on the operating characteristics and status of the one or more electronic devices; and

altering at least one of the operating characteristics of the at least one of electronic device to provide the operating level.

16. The method of claim 15 wherein the operating characteristic comprises a voltage level.

17. The method of claim 11 further comprising:

altering an operating state of a graphics processor;

determining bandwidth based on the altered operating state; and

altering an operating characteristic of the graphics processor to provide the bandwidth.

18. The method of claim 11 further comprising:

determining an operating characteristic of a first electronic device including a first bus port coupled to a communication bus;

determining an operating characteristic a second electronic device including a first bus port coupled to the communication bus; and

altering an operating characteristic of the communication bus to provide the bandwidth sufficient to communicate information between the first electronic device and the second electronic device via the communication bus.

19. A computer system employing dynamic power management of electronic devices operable to communicate information via a communication bus, the system comprising:

a processor operable to process information communicated via a communication bus, the communication bus including a multi-state operating level to support communicating the information; and

a memory device including a reference identifying an alterable operating voltage of the communication bus to provide sufficient bandwidth to communicate the information.

20. The system of claim 19 further comprising a clock generator operably associated with the processor and the communication bus and a clock reference stored within the memory relative to the operating voltage reference and alterable to provide the bandwidth.

21. The system of claim 19 further comprising:

a data controller coupled to the processor and the memory device, the data controller including a first communication bus coupled to the central processing unit and a second communication bus coupled to the memory device; and

the first and second communication buses operable to employ variable voltage levels and clock speeds for communicating the information.

22. The system of claim 19 further comprising a bandwidth dependent voltage generator operable to provide one of plural operating reference voltage levels based on the bandwidth to communicate the information via the communication bus.

23. The system of claim 19 further comprising a universal serial bus.

24. The system of claim 19 further comprising a graphics processing module coupled to the communication bus and operable to process graphic information using one or more processors.

25. The system of claim 19 wherein the communication bus comprises a high-speed communication bus operable to communicate one or more signals to provide the bandwidth.

26. The system of claim 19 further comprising a graphics device.

27. The system of claim 19 further comprising a integrated circuit.

28. A system for optimizing operating conditions of an electronic device comprising:

means for determining bandwidth needed to support communicating information between one or more electronic devices;

means for determining an operating characteristic of the at least one electronic device; and

means for altering the operating characteristic of the at least one electronic device to provide an operating level sufficient to provide the bandwidth.

29. A program of instructions embodied within encoded logic operable to:

determine bandwidth needed to support communicating information between one or more electronic devices;

determine an operating characteristic of the at least one electronic device; and

alter the operating characteristic of the at least one electronic device to provide an operating level sufficient to provide the bandwidth