Smart connector patch panel

• US 20040220736A1
• Filed: 04/30/2003
• Published: 11/04/2004
• Est. Priority Date: 04/30/2003
• Status: Active Grant

• Current Assignee: The Boeing Co.
• Original Assignee: The Boeing Co.
• Inventors: Bohr, Gerard V., Juelfs, Rodney A., Wallace, James P., Millen, Robert E.
• Granted Patent: US 6,871,156 B2
• Time in Patent Office: Days
• US Class Current: 702/1
• CPC Class Codes: H04L 43/50 Testing arrangements

Abstract

A system remotely collects test data from a test platform using platform attached sensors. Identification chips, each having a unique identification code, are each paired with an associated sensor to form sensor/chip pairs. At least one patch panel having a plurality of connections is positioned approximate to the platform. Connections are communicatively linked to each of the sensor/chip pairs. A computer system is communicatively linked to additional patch panel connections. The identification of selected sensors is queried by a computer command to the patch panels, and a group of sensors for a given test is identified and selected. Test data from each of the selected sensors is transferred through the patch panels to the computer system for collation and generation of a test setup compatible with a data acquisition system. Test setup information is downloaded to the data acquisition system in preparation for the next test.

Claims

1. A system to remotely collect test data from a mobile platform comprising:

a plurality of sensors attached to said platform;

a plurality of identification chips each having a unique identification code and each paired with an associated one of said sensors to form a plurality of sensor/chip pairs;

at least one patch panel having a plurality of connections, selected ones of said connections communicatively linked to selected ones of said sensor/chip pairs; and

a computer system communicatively linked to said connections of said patch panel and via said connections communicatively linked to said selected ones of said sensor/chip pairs.

2. The system of claim 1, wherein each of said identification codes comprises a multiple bit code formatted for digital transmission.

3. The system of claim 1, comprising a plurality of light emitting diodes, including:

a first set of light emitting diodes each positioned adjacent to an associated one of said sensor/chip pairs; and

a second set of light emitting diodes each positioned on said patch panel;

wherein each one of said second set of light emitting diodes is paired with a select one of said first set of light emitting diodes such that a confirmation signal energizes both light emitting diodes of each pair.

4. The system of claim 1, wherein each of said sensors comprises a strain gage having at least three wire leads, including a first two of said three wire leads for a strain voltage transmission and a third wire lead for a signal output.

5. The system of claim 1, comprising:

said computer system having at least a data storage component, a data analysis component, and a data transmission component; and

said computer system communicatively linked to said patch panel via a network capable application processor;

wherein said network capable application processor includes a decoder capable to decode commands transmitted from said computer system for transmission to said patch panel.

6. The system of claim 1, comprising:

each said patch panel includes a plurality of data channels, each assignable to one of said sensor/chip pairs;

each said channel having input and output connectors; and

a channel selector to assign a unique range of said data channels to each said patch panel.

7. A component identification system comprising:

a plurality of test components;

a plurality of identification chips each having individualized test component identification data stored therein, and each cooperatively linked with an associated one of said test components to form a plurality of test component/identification chip pairs;

at least one patch panel communicatively linked with said test component-identification chip pairs; and

a computer system linked to said patch panel, said computer system having a database including identification and test setup data for each said component, said computer system being communicatively linked to said test component-identification chip pairs through said patch panel to operatively report a data set of each said component.

8. The system of claim 7, wherein each said patch panel further comprises a field programmable gate array module.

9. The system of claim 8, comprising a network capable application processor communicatively linked to said patch panel to operably control each said patch panel via said field programmable gate array module.

10. The system of claim 9, comprising said computer system being networked to said network capable application processor and having a plurality of processing functions, including each of:

an identification chip individualized test component identification data retrieval function; and

a patch panel activation function.

11. The system of claim 8, wherein said patch panel further comprises:

a plurality of channels each assigned to one of said test component-identification chip pairs; and

each said channel having at least one input connector and at least one output connector.

12. The system of claim 11, wherein said patch panel further comprises:

a shunt resistor alignable across each said channel via said field programmable gate array module; and

an output of said shunt resistor readable by said computer system.

13. The system of claim 11, comprising a plurality of light emitting diodes each energized to locate one of said channels on said patch panel.

14. A strain gage identification system, comprising

a plurality of strain gages;

a plurality of identification chips each having individualized strain gage identification data stored therein, and each cooperatively linked with one of said strain gages to form a plurality of strain gage/identification chip pairs;

at least one patch panel communicatively linked with said strain gage/identification chip pairs; and

a computer communicatively linked to said patch panel, said computer having a database including said individualized strain gage identification data and location data for each said strain gage, said computer being communicatively linked to said strain gage/identification chip pairs through said patch panel to operatively identify said individualized strain gage identification data.

15. The system of claim 14, further comprising:

each said patch panel including at least an input channel for each of said strain gage/identification chip pairs; and

said computer operatively identifying an input channel number for each of said strain gage/identification chip pairs.

16. The system of claim 14, wherein each said patch panel further comprises:

a plurality of channels each assigned to one of said strain gage-identification chip pairs, each said channel having at least one input connector and at least one output connector; and

a shunt resistor alignable across each said channel input connector and said channel output connector;

wherein a voltage drop across said shunt resistor verifies a connection between said computer, said patch panel, and one of said strain gage/identification chip pairs.

17. The system of claim 16, wherein said patch panel further comprises a field programmable gate array module controllably linked to said shunt resistor.

18. The system of claim 14, wherein said individualized strain gage identification data comprises at least one of the following:

a gage name;

a gage factor;

a transverse sensitivity;

a gage resistance;

a gage type; and

a gage lot number.

19. A method to identify and collect data, using a computer, from a plurality of strain gages, each having a unique identification number, comprising the steps of:

inputting a computer command to access data from at least one of the strain gages;

bussing the command from the computer through a network capable application processor to a patch panel;

reading the unique identification number; and

collecting strain gage data from the at least one strain gage in a data acquisition system.

20. The method of claim 19, comprising decoding the command with a field programmable gate array module into a format compatible with said unique identification number.

21. The method of claim 19, comprising pairing each of the plurality of strain gages with one of a plurality of uniquely numbered identification chips to establish said unique identification number.

22. The method of claim 19, comprising disposing a plurality of input channels each having a unique input channel number for each of said strain gages in said patch panel.

23. The method of claim 22, comprising displaying corresponding ones of said unique input channel number and said unique identification number on said computer.

24. The method of claim 19, comprising storing individual strain gage identification data in the computer.

25. The method of claim 19, comprising selecting specific ones of said strain gages for a test.

26. The method of claim 19, comprising:

assigning each said strain gage to an individual data channel in a selected one of the patch panels;

signalling a shunt resistor in the selected patch panel to close; and

verifying a data channel connection between a selected one of the strain gages and the selected patch panel by a voltage change across the shunt resistor.

27. The method of claim 19, comprising communicatively linking said computer to said data acquisition system.

28. The method of claim 27, comprising generating a test setup compatible with said data acquisition system.

29. The method of claim 28, comprising downloading said test setup to said data acquisition system.

30. The method of claim 19, comprising designating an individual range of operating channels for each said patch panel.