Single computer distributed memory computing environment and implementation thereof
First Claim
1. A computing environment comprising:
- a device comprising a processor, a device memory and an operating system;
a first process running in said operating system, said first process having a first process memory and a memory cache within said first process memory;
a second process running in said operating system, said second process having a second process memory accessible to said first process; and
a communication channel between said first process and said second process;
wherein a total accessible memory of said first process comprises said first process memory and said second process memory.
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Accused Products
Abstract
A computing environment for a device having a processor, a device memory and an operating system. A first process running in the operating system has a memory and a memory cache. A second process running in the operating system has a second process memory accessible to the first process. A communication channel between the first process and second process makes the second process memory available for the first process memory to use. The device memory is sectioned into memory blocks, each having a starting address. A block ID identifies the memory block. Data is stored in various memory units of the memory block. An offset ID identifies the memory unit. A DMCE Virtual address contains the offset ID, the block Id and a device ID for identifying the memory unit. The DMCE virtual address of a memory unit used for the memory function is copied into the memory cache.
11 Citations
24 Claims
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1. A computing environment comprising:
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a device comprising a processor, a device memory and an operating system;
a first process running in said operating system, said first process having a first process memory and a memory cache within said first process memory;
a second process running in said operating system, said second process having a second process memory accessible to said first process; and
a communication channel between said first process and said second process;
wherein a total accessible memory of said first process comprises said first process memory and said second process memory. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 23, 24)
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22. A method of expanding available memory in a computing environment having a device with a processor, a device memory and an operating system comprising:
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running a first process in said operating system;
said first process having a first process memory and a memory cache within said first process memory;
running a second process in said operating system, said second process having a second process memory accessible to said first process; and
sending memory function requests between said first process and said second process through a communication channel;
generating a memory request result; and
caching said memory request result in said memory cache.
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Specification