Semiconductor device and fabrication method thereof

• US 20040222467A1
• Filed: 06/18/2004
• Published: 11/11/2004
• Est. Priority Date: 07/06/1999
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Arai, Yasuyuki, Koyama, Jun, Yamazaki, Shunpei
• Granted Patent: US 7,569,854 B2
• Time in Patent Office: Days
• US Class Current: 257/351
• CPC Class Codes: G02F 1/13306 Circuit arrangements or driving methods for the control of single liquid crystal cells G02F1/132, G02F1/133382 take precedence
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/13394 spacers regularly patterned on the cell subtrate, e.g. walls, pillars G02F1/133377 takes precedence
• CPC Class Codes: G02F 1/13396 Spacers having different sizes
• CPC Class Codes: G02F 1/13398 Spacer materials; Spacer properties
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/13624 having more than one switching element per pixel
• CPC Class Codes: G02F 1/136245 having complementary transistors
• CPC Class Codes: G02F 1/136277 formed on a semiconductor substrate, e.g. of silicon
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 21/0214 the material being a silicon oxynitride, e.g. SiON or SiON:H
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02208 the precursor containing a compound comprising Si
• CPC Class Codes: H01L 21/02266 deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02532 : Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02592 : amorphous
• CPC Class Codes: H01L 21/0262 : Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02631 : Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02667 : Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/0273 : characterised by the treatment of photoresist layers
• CPC Class Codes: H01L 21/3065 : Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/3081 : characterised by their composition, e.g. multilayer masks, materials
• CPC Class Codes: H01L 27/12 : the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1214 : comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1218 : with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1248 : with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1251 : comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1274 : using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
• CPC Class Codes: H01L 27/1288 : employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/167 : further characterised by the doping material H01L29/1604 takes precedence
• CPC Class Codes: H01L 29/66742 : Thin film unipolar transistors
• CPC Class Codes: H01L 29/66757 : Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/7833 : with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/78621 : with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78672 : Polycrystalline or microcrystalline silicon transistor
• CPC Class Codes: H01L 29/78675 : with normal-type structure, e.g. with top gate
• CPC Class Codes: Y10S 438/919 : Compensation doping

Abstract

A p channel TFT of a driving circuit has a single drain structure and its n channel TFT, an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel unit is connected to the pixel TFT through a hole bored in at least a protective insulation film formed of an inorganic insulating material and formed above a gate electrode of the pixel TFT, and in an inter-layer insulation film disposed on the insulation film in close contact therewith. These process steps use 6 to 8 photo-masks.

Claims

1. A semiconductor device having, on the same substrate, pixel TFTs disposed in a pixel unit and a driving circuit including p channel type TFTs and n channel type TFTs and disposed round said pixel unit, wherein:

said p channel type TFT of said driving circuit has a channel formation region and a p type impurity region having a third concentration, for forming a source region or a drain region;

said n channel type TFT of said driving circuit and said pixel TFT each have a channel formation region, an n type impurity region having a first concentration, disposed in contact with said channel formation region and forming an LDD region, and an n type impurity region for forming a source region or a drain region, having a second concentration and disposed outside said n type impurity region having the first concentration; and

each pixel electrode disposed in said pixel unit has a light reflecting surface is formed on an inter-layer insulation film made of an organic insulating material, and is connected to said pixel TFT through a hole bored in at least a protective insulation film made of an inorganic insulating material and disposed above a gate electrode of said pixel TFT and said inter-layer insulation film formed on said protective insulation film in close contact therewith.

2. A device according to claim 1, wherein said p channel type TFT of said driving circuit has an offset region formed between said channel formation region and said p type impurity region having the third concentration, for forming the source region or the drain region.

3. A device according to claim 2, wherein said p channel type TFT of said driving circuit is used as at least an analog switch.

4. A device according to claim 1, wherein the gate of each of said pixel TFT and said n-channel type TFT and said p channel type TFT of said driving circuit is formed of a heat-resistant conductive material, and said gate lead wire extending from said driving circuit and connected to said gate electrode is formed of a low resistance conductive material.

5. A device according to claim 4, wherein said heat-resistant conductive material is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo) and tungsten (W), or a compound consisting of said element as the principal component, or a compound comprising the combination of said elements, or a nitride consisting of said element as a component or a silicide consisting of said element as a component.

6. A device according to claim 1, wherein said semiconductor device is one of the member selected from the group consisting of a personal computer, a video camera, a portable information terminal, a digital camera, a digital video disk player, an electronic game machine and a projector.

28. A device according to claim 1, wherein said semiconductor device is one of the member selected from the group consisting of a personal computer, a video camera, a portable information terminal, a digital camera, a digital video disk player, an electronic game machine and a projector.

7. A semiconductor device having, on the same substrate, pixel TFTs disposed in a pixel unit and a driving circuit including p channel type TFTs and n channel type TFTs and disposed round said pixel unit, wherein:

said p channel type TFT of said driving circuit has a channel formation region and a p type impurity region having a third concentration, for forming a source region or a drain region;

said n channel type TFT of said driving circuit and said pixel TFT each have a channel formation region, an n type impurity region having a first concentration, disposed in contact with said channel formation region and forming an LDD region, and an n type impurity region for forming a source region or a drain region, having a second concentration and disposed outside said n type impurity region having the first concentration; and

each pixel electrode disposed in said pixel unit has a light transmitting surface and is formed on an inter-layer insulation film made of an organic insulating material, and is connected to an electrically conductive lead wire connected to said pixel TFT, through a hole bored in at least a protective insulation film made of an inorganic insulating material and disposed above a gate electrode of said pixel TFT and said inter-layer insulation film formed on said protective insulation film in close contact therewith.

8. A device according to claim 7, wherein said p channel type TFT of said driving circuit has an offset region formed between said channel formation region and said p type impurity region having the third concentration, for forming the source region or the drain region.

9. A device according to claim 8, wherein said p channel type TFT of said driving circuit is used as at least an analog switch.

10. A device according to claim 7, wherein the gate of each of said pixel TFT and said n-channel type TFT and said p channel type TFT of said driving circuit is formed of a heat-resistant conductive material, and said gate lead wire extending from said driving circuit and connected to said gate electrode is formed of a low resistance conductive material.

11. A device according to claim 10, wherein said heat-resistant conductive material is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo) and tungsten (W), or a compound consisting of said element as the principal component, or a compound comprising the combination of said elements, or a nitride consisting of said element as a component or a silicide consisting of said element as a component.

12. A device according to claim 7, wherein said semiconductor device is one of the member selected from the group consisting of a personal computer, a video camera, a portable information terminal, a digital camera, a digital video disk player, an electronic game machine and a projector.

13. A semiconductor device having a liquid crystal sandwiched between a pair of substrates, wherein:

in one of said substrates having pixel TFT of a pixel unit and p channel type TFTs and n channel type TFTs of a driving circuit;

said p channel type TFT of said driving circuit has a channel formation region and a p type impurity region having a third concentration, for forming a source region or a drain region;

said n channel type TFT of said driving circuit and said pixel TFT each have a channel formation region, an n type impurity region having a first concentration, disposed in contact with said channel formation region and forming an LDD region, and an n type impurity region for forming a source region or a drain region, having a second concentration and disposed outside said n type impurity region having the first concentration;

each pixel electrode disposed in said pixel unit has a light reflecting surface and is formed on an inter-layer insulation film made of an organic insulating material and is connected to said pixel TFT through a hole bored in at least a protective insulation film made of an inorganic insulating material and disposed above a gate electrode of said pixel TFT and said inter-layer insulation film formed on said protective insulation film in close contact therewith; and

said one substrate is bonded to the other of said substrates having a transparent conductor film formed thereon through at least one columnar spacer formed in superposition with said hole.

14. A device according to claim 13, wherein said p channel type TFT of said driving circuit has an offset region formed between said channel formation region and said p type impurity region having the third concentration, for forming the source region or the drain region.

15. A device according to claim 14, wherein said p channel type TFT of said driving circuit is used as at least an analog switch.

16. A device according to claim 13, wherein the gate of each of said pixel TFT and said n-channel type TFT and said p channel type TFT of said driving circuit is formed of a heat-resistant conductive material, and said gate lead wire extending from said driving circuit and connected to said gate electrode is formed of a low resistance conductive material.

17. A device according to claim 16, wherein said heat-resistant conductive material is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo) and tungsten (W), or a compound consisting of said element as the principal component, or a compound comprising the combination of said elements, or a nitride consisting of said element as a component or a silicide consisting of said element as a component.

18. A device according to claim 13, wherein said columnar spacer is formed on said p channel type TFT and said n channel type TFT of said driving circuit.

19. A device according to claim 13, wherein said columnar spacer is so formed as to cover at least the source lead wire or the drain lead wire of said p channel type TFT and said n channel type TFT of said driving circuit.

20. A device according to claim 13, wherein said semiconductor device is one of the member selected from the group consisting of a personal computer, a video camera, a portable information terminal, a digital camera, a digital video disk player, an electronic game machine and a projector.

21. A semiconductor device having a liquid crystal sandwiched between a pair of substrates, wherein:

in one of said substrates having pixel TFTs of a pixel unit and p channel type TFTs and n channel type TFTs of a driving circuit;

said p channel type TFT of said driving circuit has a channel formation region and a p type impurity region having a third concentration, for forming a source region or a drain region;

said n channel type TFT of said driving circuit and said pixel TFT each have a channel formation region, an n type impurity region having a first concentration, disposed in contact with said channel formation region and forming an LDD region, and an n type impurity region for forming a source region or a drain region, having a second concentration and disposed outside said n type impurity region having the first concentration;

each pixel electrode disposed in said pixel unit has a light transmitting property and is formed on an inter-layer insulation film made of an organic insulating material and is connected to a conductive metal lead wire connected to said pixel TFT through a hole bored in at least a protective insulation film made of an inorganic insulating material and disposed above a gate electrode of said pixel TFT and said inter-layer insulation film formed on said protective insulation film in close contact therewith; and

said one substrate is bonded to the other of said substrates having a transparent conductor formed thereon through at least one columnar spacer formed in superposition with said hole.

22. A device according to claim 21, wherein said p channel type TFT of said driving circuit has an offset region formed between said channel formation region and said p type impurity region having the third concentration, for forming the source region or the drain region.

23. A device according to claim 22, wherein said p channel type TFT of said driving circuit is used as at least an analog switch.

24. A device according to claim 21, wherein the gate of each of said pixel TFT and said n-channel type TFT and said p channel type TFT of said driving circuit is formed of a heat-resistant conductive material, and said gate lead wire extending from said driving circuit and connected to said gate electrode is formed of a low resistance conductive material.

25. A device according to claim 24, wherein said heat-resistant conductive material is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo) and tungsten (W), or a compound consisting of said element as the principal component, or a compound comprising the combination of said elements, or a nitride consisting of said element as a component or a silicide consisting of said element as a component.

26. A device according to claim 21, wherein said columnar spacer is formed on said p channel type TFT and said n channel type TFT of said driving circuit.

27. A device according to claim 21, wherein said columnar spacer is so formed as to cover at least the source lead wire or the drain lead wire of said p channel type TFT and said n channel type TFT of said driving circuit.

29-33. -33. (Canceled)

34. A method of fabricating a semiconductor device having, on the same substrate, a pixel TFT disposed in a pixel unit and a driving circuit including a p channel type TFT and an n channel type TFT and disposed round said pixel unit, comprising the steps of:

forming an underlying film over said substrate;

forming a plurality of island-like semiconductor layers over said underlying film;

forming n type impurity regions having a first concentration, for forming LDD regions of said n channel type TFT of said driving circuit and said pixel TFT in a selected region of said island-like semiconductor layer;

forming high concentration n type impurity regions for forming source regions or drain regions outside said n type impurity regions having the first concentration;

forming a p type impurity region having a third concentration, for forming a source region or a drain region of said p channel type TFT of said driving circuit in a selected region of said island-like semiconductor layers;

forming a protective insulation film formed of an inorganic insulating material above gate electrodes of said n channel type TFT of said driving circuit, said pixel TFT and said p channel type TFT;

forming an inter-layer insulation film formed of an organic insulating material in close contact with said protective insulation film;

forming a conductive metal lead wire to be connected to said pixel TFT; and

forming a pixel electrode comprising a transparent conductor film to be connected to said conductive metal lead wire, on said inter-layer insulation film.

35. A method according to claim 34, wherein, as for said p channel type TFT of said driving circuit, the step of forming a p type impurity region having a third concentration, for forming a source region or a drain region of said p channel type TFT is conducted in a selected region of said island-like semiconductor layers after said step of forming said protective insulation film formed of an inorganic insulating material, on the gate electrode of said p channel type TFT, and an offset region is formed between the channel formation region of said p channel type TFT and said p type impurity region having the third concentration, for forming the source region or the drain region.

36. A method according to claim 34, which further comprises the steps of:

forming the gate electrodes of said pixel TFT and said p channel type TFT and said n channel type TFT round said pixel unit from a heat-resistant conductive material; and

forming said gate lead wire extending from said driving circuit and to be connected to said gate electrodes, from a low resistance conductive material.

37. A method according to claim 36, wherein said heat-resistant conductive material is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo) and tungsten (W), or a compound consisting of said element as a principal component, or a compound comprising the combination of said elements, or a nitride containing said element as a component or a silicide containing said element as a component.

38. A method according to claim 34, wherein said semiconductor device is one member selected from the group consisting of a personal computer, a video camera, a portable information terminal, a digital camera, a digital video disk player, an electronic game machine and a projector.

39. A method of fabricating a semiconductor device having a liquid crystal sandwiched between a pair of substrates, comprising, the following steps for one of substrates including a pixel TFT disposed in a pixel unit and a driving circuit having a p channel type TFT and an n channel type TFT round said pixel unit:

forming an underlying film over said one of substrates;

forming a plurality of island-like semiconductor layers over said underlying film;

forming n type impurity regions having a first concentration, for forming LDD regions of said n channel type TFT of said driving circuit and said pixel TFT, in a selected region of said island-like semiconductor layers;

forming n type impurity regions having a second concentration, for forming source regions or drain regions outside said n type impurity regions having the first concentration;

forming a p type impurity region having a third concentration, for forming a source region or a drain region of said p channel type TFT of said driving circuit, in a selected region of said island-like semiconductor layers;

forming a protective insulation film formed of an inorganic insulating material above the gate electrodes of said n channel type TFT of said driving circuit, said pixel TFT and said p channel type TFT;

forming an inter-layer insulating film formed of an organic insulating material in close contact with said protective insulation film; and

forming on said inter-layer insulation film a pixel electrode having a light reflecting surface and to be connected to said pixel TFT through a hole bored in said inter-layer insulation film and in said protective insulation film; and

comprising, as for the other of said substrates, the step of forming at least a transparent conductor film;

said method further comprising the step of bonding said one of substrates to the other of said substrates through at least one columnar spacer formed in superposition with said hole.

40. A method according to claim 39, wherein, as for said p channel type TFT of said driving circuit, the step of forming a p type impurity region having a third concentration, for forming a source region or a drain region of said p channel type TFT is conducted in a selected region of said island-like semiconductor layers after said step of forming said protective insulation film formed of an inorganic insulating material, on the gate electrode of said p channel type TFT, and an offset region is formed between the channel formation region of said p channel type TFT and said p type impurity region having the third concentration, for forming the source region or the drain region.

41. A method according to claim 39, which further comprises the steps of:

forming the gate electrodes of said pixel TFT and said p channel type TFT and said n channel type TFT round said pixel unit from a heat-resistant conductive material; and

forming said gate lead wire extending from said driving circuit and to be connected to said gate electrodes, from a low resistance conductive material.

42. A method according to claim 41, wherein said heat-resistant conductive material is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo) and tungsten (W), or a compound consisting of said element as a principal component, or a compound comprising the combination of said elements, or a nitride containing said element as a component or a silicide containing said element as a component.

43. A method according to claim 39, wherein said semiconductor device is one member selected from the group consisting of a personal computer, a video camera, a portable information terminal, a digital camera, a digital video disk player, an electronic game machine and a projector.

44. A method according to claim 39, wherein said columnar spacer is formed also over said p channel type TFT and said n channel type TFT of said driving circuit.

45. A method according to claim 39, wherein said columnar spacer is formed in such a fashion as to cover at least the source lead wire or the drain lead wire of said p channel type TFT and said n channel type TFT of said driving circuit.

46. A method of fabricating a semiconductor device having a liquid crystal sandwiched between a pair of substrates, comprising the following steps for one of substrates having a pixel TFT disposed in a pixel unit and a driving circuit having a p channel type TFT and an n channel type TFT and disposed round said pixel unit;

forming an underlying film over said one of substrates;

forming a plurality of island-like semiconductor layers over said underlying film;

forming n type impurity regions having a first concentration, for forming LDD regions of said n channel type TFT and said pixel TFT, in a selected region of said island-like semiconductor layers;

forming n type impurity region having a second concentration, for forming source regions or drain regions outside said n type impurity regions having the first concentration;

forming a p type impurity region having a third concentration, for forming a source region or a drain region of said p channel type TFT of said driving circuit, in a selected region of said island-like semiconductor layers;

forming a protective insulation film formed of an inorganic insulating material above gate electrodes of said n channel type TFT of said driving circuit, said pixel TFT and said p channel type TFT;

forming an inter-layer insulation film formed of an organic insulating material in close contact with said protective insulation film;

forming a conductive metal lead wire connected to said pixel TFT, through a hole bored in said inter-layer insulation film and said protective insulation film; and

forming a pixel electrode comprising a transparent conductor film to be connected to said metal lead wire, on said inter-layer insulation film; and

comprising, as for the other of said substrates, the step of forming at least a transparent conductor film on the other of said substrates;

said method further comprising the step of bonding said one of substrates to the other of said substrates through at least one columnar spacer formed in superposition with said hole.

47. A method according to claim 46, wherein, as for said p channel type TFT of said driving circuit, the step of forming a p type impurity region having a third concentration, for forming a source region or a drain region of said p channel type TFT is conducted in a selected region of said island-like semiconductor layers after said step of forming said protective insulation film formed of an inorganic insulating material, on the gate electrode of said p channel type TFT, and an offset region is formed between the channel formation region of said p channel type TFT and said p type impurity region having the third concentration, for forming the source region or the drain region.

48. A method according to claim 46, which further comprises the steps of:

forming the gate electrodes of said pixel TFT and said p channel type TFT and said n channel type TFT round said pixel unit from a heat-resistant conductive material; and

forming said gate lead wire extending from said driving circuit and to be connected to said gate electrodes, from a low resistance conductive material.

49. A method according to claim 48, wherein said heat-resistant conductive material is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo) and tungsten (W), or a compound consisting of said element as a principal component, or a compound comprising the combination of said elements, or a nitride containing said element as a component or a silicide containing said element as a component.

50. A method according to claim 46, wherein said semiconductor device is one member selected from the group consisting of a personal computer, a video camera, a portable information terminal, a digital camera, a digital video disk player, an electronic game machine and a projector.

51. A method according to claim 46, wherein said columnar spacer is formed also over said p channel type TFT and said n channel type TFT of said driving circuit.

52. A method according to claim 46, wherein said semiconductor device is one member selected from the group consisting of a personal computer, a video camera, a portable information terminal, a digital camera, a digital video disk player, an electronic game machine and a projector.

53. A method of fabricating a semiconductor device having, on the same substrate, a pixel TFT disposed in a pixel unit and a driving circuit including an n channel type TFT and disposed round said pixel unit, said method comprising:

forming at least two island-like semiconductor layers over said substrate;

forming a gate electrode over each of said at least two island-like semiconductor layers;

introducing a first n type impurity into each of said at least two island-like semiconductor layers at a first concentration by using said gate electrode as a mask;

introducing a second n type impurity into each of said at least two island-like semiconductor layers at a second concentration by using said gate electrode as a mask and by using a resist as a mask to form an LDD region having said first concentration in said pixel TFT and said n channel type TFT and to form a source region and a drain region having said second concentration in said pixel TFT and said n channel type TFT;

forming a protective insulation film formed of an inorganic insulating material over said gate electrode;

activating said first n type impurity and said second n type impurity after the formation of said protective insulating film; and

forming an inter-layer insulation film formed of an organic insulating material over said protective insulation film after the activation.

54. A method according to claim 53 wherein the activation is conducted by a thermal annealing method.

55. A method according to claim 53 wherein the activation is conducted by a laser annealing method.

56. A method according to claim 53 wherein the activation is conducted by a rapid thermal annealing method.

57. A method according to claim 53 wherein said first n type impurity is same as said second n type impurity

58. A method according to claim 53, wherein said gate electrode comprises an element selected from the group consisting of tantalum (Ta), titanium (Ti), molybdenum (Mo) and tungsten (W), or a compound consisting of said element as a principal component, or a compound comprising the combination of said elements.

59. A method according to claim 53, wherein said gate electrode comprises a nitride selected from the group consisting of tantalum nitride, tungsten nitride, titanium nitride and molybdenum nitride.

60. A method according to claim 53, wherein said gate electrode comprises a silicide selected from the group consisting of tungsten silicide, titanium silicide and molybdenum silicide.

61. A method according to claim 53, wherein said semiconductor device is one member selected from the group consisting of a personal computer, a video camera, a portable information terminal, a digital camera, a digital video disk player, an electronic game machine and a projector.

62. A method according to claim 53 wherein said protective insulation film comprises a material selected from the group consisting of silicon oxide, silicon oxide nitride and silicon nitride.