Universal computer architecture

• US 20040225415A1
• Filed: 06/02/2004
• Published: 11/11/2004
• Est. Priority Date: 08/11/2001
• Status: Active Grant

• Current Assignee: OL Security LLC (Intellectual Ventures LLC)
• Original Assignee: Daimler Chrysler Company LLC (Stellantis NV)
• Inventors: Newberry, Robert
• Granted Patent: US 7,103,429 B2
• Time in Patent Office: Days
• US Class Current: 701/1
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture

Abstract

A universal computer for a transport means, comprising a microprocessor for the processing of control programs, a storage means, for the data thus calculated and an interface which permits a connection of the computer to a databus in the transport means. The computer comprises control programs for controlling device provided in the transport means, whereby the control commands are transmitted to the device to be controlled by means of device interfaces. The computer also comprises reconfigurable hardware, which permits a retroactive reconfiguration of peripheral components or an interface in the assembled state of the computer. Transmission means are provided which transmit an algorithm for reconfiguration of the hardware to the storage means on the transport means, so that a process for reconfiguration of the hardware associated with the peripheral components or the interface may be carried out.

Claims

1. A universal computer for a vehicle, said universal computer comprising a microprocessor for processing control programs;

a storage unit for data calculated in processing;

an interface for connecting the computer to a vehicle data bus;

control programs for controlling devices provided in the vehicle, control instructions being transmitted via device interfaces to devices to be controlled;

reconfigurable hardware which permits subsequent reconfiguration of peripheral components or of an interface in the installed state of the computer;

transmission means which transmit an algorithm for reconfiguring the hardware to the storage unit whereby a process for reconfiguring the hardware with regard to the peripheral components or to the interface can be carried out;

a storage control unit which automatically transmits the algorithm for reconfiguring the hardware to the storage unit; and

a memory in which a plurality of data pages for configuring the hardware are stored;

wherein only one of the data pages is classified as valid as in the present device configuration; and

wherein, the storage control unit retrieves the applicable data pages during the configuration.

2. The computer as claimed in claim 1, wherein the reconfigurable hardware has freely connectable memory cells with reconfigurable electrical connections which can be subsequently newly connected in accordance with the algorithm for reconfiguring the hardware in the installed state of the computer.

3. The computer as claimed in claim 1, wherein the reconfigurable hardware comprises a field programmable gate array.

4. The computer as claimed in claim 1, wherein the storage control transmits the algorithm for reconfiguring the hardware to the storage unit without affecting the Processor time of the microprocessor.

5. The computer as claimed in claim 1, wherein the storage unit comprises a flash memory which is connected to a wireless interface via which the algorithm for reconfiguring the hardware can be transmitted into the flash memory.

6. The computer as claimed in claim 1, part of the computer is composed of standard cell blocks which are embodied as reconfigurable hardware.

7. The computer as claimed in claim 6, wherein the microprocessor has standard cell blocks which can be wired via the reconfigurable hardware to an interface in a variable fashion.

8. The computer as claimed in claim 1, wherein configuration of the hardware that is necessary for a device that is to be coupled externally to the device interfaces is stored in the form of a hardware description language for transmission to the computer in the device.

9. The computer as claimed in claim 8, wherein the device interface transmits the hardware description language for peripherals and interfaces of the computer to at least one of the computer and the storage control means.

10. The computer as claimed in claim 1, wherein:

a storage control means is provided; and

a transmission safety means permits a transmission of an algorithm for reconfiguring the hardware, only after a check to determine whether a utilized method of data transmission is permissible in the present state of the vehicle or of the computers and/or whether the sender is authorized to transmit a new algorithm for reconfiguring the hardware.