Display panel driver

• US 20040227747A1
• Filed: 05/03/2004
• Published: 11/18/2004
• Est. Priority Date: 05/14/2003
• Status: Active Grant

• Current Assignee: HannStar Display Corporation
• Original Assignee: NEC Corporation
• Inventors: Haga, Hiroshi, Ishibashi, Osamu, Asada, Hideki
• Granted Patent: US 7,283,132 B2
• Time in Patent Office: Days
• US Class Current: 345/204
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04

Abstract

The relationship L1≦V(F1×ε^1/2×100) is satisfied where a transmission path length between the interface 1 and the timing controller is L1, a propagating speed of electromagnetic waves in a vacuum is V, a frequency of a signal transmitted between the interface and the timing controller is F1, and a comparative dielectric constant of a transmission path medium between the interface and the timing controller is ε1. The relationship L2≦V(F2×ε2^1/2×100) is satisfied where a transmission path length between the timing controller and the signal driving portion is L2, a propagating speed of electromagnetic waves in a vacuum is V, a frequency of a signal transmitted between the timing controller and the signal line driving portion is F2, and a comparative dielectric constant of a transmission path medium between the timing controller and the signal line driving portion is ε2. Thus, the occurrence of EMI noise can be suppressed, and the implementation cost of a display apparatus can be reduced.

Claims

1. A display panel driver, comprising:

an interface for receiving low voltage differential signals and retrieving video signals, synchronous signals, clock signals and control signals from the low voltage differential signals;

a timing controller for generating a display control signal based on the synchronous signals, clock signals and control signals retrieved by the interface; and

a signal line driving portion for generating and outputting driving signals for driving signal lines of a display panel based on the video signals retrieved by the interface and the display control signal generated by the timing controller,

wherein the relationship

L1≦

V(F1×

ε

1^1/2×

100)

 

is satisfied where a transmission path length between the interface and the timing controller is L1, a propagating speed of electromagnetic waves in a vacuum is V, a frequency of a signal transmitted between the interface and the timing controller is F1, and a comparative dielectric constant of a transmission path medium between the interface and the timing controller is ε

1, and the relationship

L2≦

V(F2×

ε

2^1/2×

100)

 

is satisfied where a transmission path length between the timing controller and the signal driving portion is L2, a propagating speed of electromagnetic waves in a vacuum is V, a frequency of a signal transmitted between the timing controller and the signal line driving portion is F2, and a comparative dielectric constant of a transmission path medium between the timing controller and the signal line driving portion is ε

2.

2. The display panel driver according to claim 1, further comprising a display control signal output portion for outputting the display control signals generated by the timing controller to a scan line driving circuit for driving scan lines of the display panel.

3. The display panel driver according to claim 2, wherein the display control signals output from the control signal output portion are low voltage differential signals.

4. The display panel driver according to claim 2, wherein the display control signals output from the control signal output portion are TTL/CMOS signals.

5. The display panel driver according to claim 1, wherein the interface, the timing controller and the signal line driving portion are provided on a substrate of the display panel.

6. The display panel driver according to claim 2, wherein the interface, the timing controller and the signal line driving portion are provided on a substrate of the display panel.

7. The display panel driver according to claim 3, wherein the interface, the timing controller and the signal line driving portion are provided on a substrate of the display panel.

8. The display panel driver according to claim 4, wherein the interface, the timing controller and the signal line driving portion are provided on a substrate of the display panel.

9. The display panel driver according to claim 1, further comprising a phase demultiplexer for demultiplexing the video signals retrieved by the interface to lower a frequency thereof by 1/n multiplying,

wherein the signal line driving portion generates and outputs the driving signals for driving the signal lines based on video signals demultiplexed by the demultiplexer.

10. The display panel driver according to claim 2, further comprising a phase demultiplexer for demultiplexing the video signals retrieved by the interface to lower a frequency thereof by 1/n multiplying,

wherein the signal line driving portion generates and outputs the driving signals for driving the signal lines based on video signals demultiplexed by the demultiplexer.

11. The display panel driver according to claim 3, further comprising a phase demultiplexer for demultiplexing the video signals retrieved by the interface to lower a frequency thereof by 1/n multiplying,

wherein the signal line driving portion generates and outputs the driving signals for driving the signal lines based on video signals demultiplexed by the demultiplexer.

12. The display panel driver according to claim 4, further comprising a phase demultiplexer for demultiplexing the video signals retrieved by the interface to lower a frequency thereof by 1/n multiplying,

wherein the signal line driving portion generates and outputs the driving signals for driving the signal lines based on video signals demultiplexed by the demultiplexer.

13. The display panel driver according to claim 9, wherein the relationship

L3≦

V(F3×

ε

3^1/2×

100)

is satisfied where a transmission path length between the phase demultiplexer and the signal line driving portion is L3, a propagating speed of electromagnetic waves in a vacuum is V, a frequency of a signal transmitted between the phase demultiplexer and the signal line driving portion is F3, and a comparative dielectric constant of a transmission path medium between the phase demultiplexer and the signal line driving portion is ε

3.

14. The display panel driver according to claim 10, wherein the relationship

L3≦

V(F3×

ε

3^1/2×

100)

is satisfied where a transmission path length between the phase demultiplexer and the signal line driving portion is L3, a propagating speed of electromagnetic waves in a vacuum is V, a frequency of a signal transmitted between the phase demultiplexer and the signal line driving portion is F3, and a comparative dielectric constant of a transmission path medium between the phase demultiplexer and the signal line driving portion is ε

3.

15. The display panel driver according to claim 11, wherein the relationship

L3≦

V(F3×

ε

3^1/2×

100)

is satisfied where a transmission path length between the phase demultiplexer and the signal line driving portion is L3, a propagating speed of electromagnetic waves in a vacuum is V, a frequency of a signal transmitted between the phase demultiplexer and the signal line driving portion is F3, and a comparative dielectric constant of a transmission path medium between the phase demultiplexer and the signal line driving portion is ε

3.

16. The display panel driver according to claim 12, wherein the relationship

L3≦

V(F3×

ε

3^1/2×

100)

is satisfied where a transmission path length between the phase demultiplexer and the signal line driving portion is L3, a propagating speed of electromagnetic waves in a vacuum is V, a frequency of a signal transmitted between the phase demultiplexer and the signal line driving portion is F3, and a comparative dielectric constant of a transmission path medium between the phase demultiplexer and the signal line driving portion is ε

3.

17. The display panel driver according to claim 9, wherein the phase demultiplexer is provided on a substrate of the display panel.

18. The display panel driver according to claim 10, wherein the phase demultiplexer is provided on a substrate of the display panel.

19. The display panel driver according to claim 11, wherein the phase demultiplexer is provided on a substrate of the display panel.

20. The display panel driver according to claim 12, wherein the phase demultiplexer is provided on a substrate of the display panel.

21. The display panel driver according to claim 13, wherein the phase demultiplexer is provided on a substrate of the display panel.

22. The display panel driver according to claim 14, wherein the phase demultiplexer is provided on a substrate of the display panel.

23. The display panel driver according to claim 15, wherein the phase demultiplexer is provided on a substrate of the display panel.

24. The display panel driver according to claim 16, wherein the phase demultiplexer is provided on a substrate of the display panel.

25. The display panel driver according to claim 1, wherein the display panel driver is an integrated circuit.

26. The display panel driver according to claim 25, wherein the integrated circuit is provided on a substrate of the display panel driver.

27. The display panel driver according to claim 26-, wherein the integrated circuit is provided along one side of the display panel, and the length of the display panel driver in a direction along the side of the display panel is equal to the length of the side.

28. The display panel driver according to claim 26, wherein a material of the substrate of the integrated circuit is the same as a material used for the substrate of the display panel.

29. The display panel driver according to claim 27, wherein a material of the substrate of the integrated circuit is the same as a material used for the substrate of the display panel.