POWER SUPPLIES AND ULTRACAPACITOR BASED BATTERY SIMULATOR

• US 20040228055A1
• Filed: 05/16/2003
• Published: 11/18/2004
• Est. Priority Date: 05/16/2003
• Status: Active Grant

• Current Assignee: Ballard Power Systems Corporation (Siemens AG)
• Original Assignee: Ballard Power Systems Corporation (Siemens AG)
• Inventors: Pearson, Martin T.
• Granted Patent: US 6,838,923 B2
• Time in Patent Office: Days
• US Class Current: 361/93.1
• CPC Class Codes: H01M 16/006 of fuel cells with rechargeable batteries
• CPC Class Codes: H01M 8/04888 of auxiliary devices, e.g. batteries, capacitors
• CPC Class Codes: H01M 8/04917 of auxiliary devices, e.g. batteries, capacitors
• CPC Class Codes: H02J 2300/30 The power source being a fuel cell
• CPC Class Codes: H02J 7/0013 acting upon several batteries simultaneously or sequentially H02J7/1423 takes precedence
• CPC Class Codes: H02J 7/345 using capacitors as storage or buffering devices
• CPC Class Codes: Y02E 60/10 Energy storage using batteries
• CPC Class Codes: Y02E 60/50 Fuel cells

Abstract

An ultracapacitor based power storage device suitable for use in hybrid fuel cell systems and other power systems includes circuitry for simulating the response of a battery. A voltage current limiting circuit may be employed with a variety of electrical storage devices, for example, ultracapacitors and batteries.

Claims

1. An electrical circuit for use in a power system, comprising:

a number of ultracapacitors electrically coupled in series;

a charging current limiter electrically coupled in series with the ultracapacitors; and

a bypass element electrically coupled across the charging current limiter and operable to provide a path bypassing the charging current limiter.

2. The electrical circuit of claim 1 wherein the bypass element is a bypass diode.

3. The electrical circuit of claim 1, further comprising:

for each of the ultracapacitors, a number of surge diodes electrically coupled across a respective one of the ultracapacitors.

4. The electrical circuit of claim 1, further comprising:

for each of the ultracapacitors, a number of surge diodes, electrically coupled across a respective one of the ultracapacitors, wherein one of the number of surge diodes is a zener diode.

5. The electrical circuit of claim 1, further comprising:

for each of the ultracapacitors, a number of surge diodes electrically coupled across a respective one of the ultracapacitors wherein the sum of voltages of the surge diodes is approximately equal to a voltage rating of the respective ultracapacitor.

6. The electrical circuit of claim 1, further comprising:

a reverse current blocking diode electrically coupled in parallel with the number of ultracapacitors and the charging current limiter.

7. The electrical circuit of claim 1 wherein the charging current limiter is electrically coupled between a first and a last one of the number of ultracapacitors taken in an order defined by the series electrical coupling of the ultracapacitors.

8. The electrical circuit of claim 1 wherein the charging current limiter is electrically coupled before a first one of the number of ultracapacitors taken in an order defined by the series electrical coupling of the ultracapacitors.

9. The electrical circuit of claim 1 wherein the charging current limiter is a linear mode circuit controller.

10. The electrical circuit of claim 1 wherein the charging current limiter is a switch mode current controller.

11. The electrical circuit of claim 1, further comprising:

a fuel cell stack electrically coupled in parallel with the number of ultracapacitors.

12. An electrical circuit for use in a power system, comprising:

a number of ultracapacitors electrically coupled in series;

a linear mode charging current limiter electrically coupled in series with the ultracapacitors; and

a bypass element electrically coupled across the charging current limiter and to selectively provide a bypass of the charging current limiter.

13. The electrical circuit of claim 12 wherein the linear mode charging current limiter comprises:

a charging current limiting transistor comprising a pair of active terminals and a control terminal, the active terminals electrically coupled in series with the ultracapacitors to pass a charging current through the ultracapacitors in response to a charging voltage exceeding a threshold voltage; and

a feedback transistor electrically coupled to control the charging current limiting transistor to limit the charging current to a threshold current.

14. The electrical circuit of claim 12 wherein the charging current limiter comprises:

a charging current limiting comprising a pair of active terminals and a control terminal, the active terminals electrically coupled in series with the ultracapacitors, and a control terminal electrically coupled across a power bus;

a zener diode electrically coupled between a portion of the power bus and the control terminal of the charging current limiting transistor to set a turn-on voltage; and

a feedback transistor comprising a pair of control terminals electrically coupled to the control terminal of the charging current limiting transistor to limit a flow of current through the active terminals of the first transistor.

15. The electrical circuit of claim 14 wherein the charging current limiter further comprises:

a first loss limiting transistor; and

a second loss limiting transistor, the first and the second loss limiting transistors electrically coupled in a Darlington arrangement between the control terminal of the charging current limiting transistor and the zener diode.

16. The electrical circuit of claim 15 wherein the charging current limiter further comprises:

an over voltage zener diode; and

an over voltage transistor having a pair of active terminals electrically coupled to respective ones of the active terminals of the feedback transistor, and comprising a control terminal electrically coupled to a portion of the power bus through the overvoltage zener diode to cut off the charging current when a voltage across the power bus exceeds an over voltage threshold.

17. The electrical circuit of claim 15 wherein the charging current limiter further comprises:

a zener diode;

an over voltage transistor comprising a pair of active terminals and a control terminal, the active terminals electrically coupled to respective ones of the active terminals of the feedback transistor, and the control terminal electrically coupled to a portion of the power bus; and

a voltage setting transistor comprising a pair of active terminals and a control terminal, the active terminals electrically coupled between the control terminal of the over voltage transistor and another portion of the power bus, and the control terminal electrically coupled to the ultracapacitors through the zener diode.

18. A method of operating a power system comprising a power bus and a plurality of ultracapacitors electrically coupled to one another in series, the method comprising:

during a first period, supplying a charging current via a charging current limiter to the plurality of ultracapacitors, the current limiter limiting the charging current supplied to the plurality of ultracapacitors below a charging current limit threshold; and

during a second period, discharging the plurality of ultracapacitors via a discharge element that bypasses the charging current limiter.

19. The method of claim 18 wherein discharging the plurality of ultracapacitors via a discharge element that bypasses the charging current limiter comprises discharging the plurality of ultracapacitors via a bypass diode electrically coupled across the charging current limiter.

20. The method of claim 18, further comprising:

limiting a voltage across each of the ultracapacitors while supplying the charging current during the first period.

21. The method of claim 18 wherein limiting a voltage across each of the ultracapacitors while supplying the charging current comprises, for each of the ultracapacitors, clamping a voltage across the ultracapacitor via a number of surge diodes electrically coupled across the respective ultracapacitor.

22. The method of claim 18, further comprising:

stopping the supplying of charging current to the plurality of ultracapacitors in the event of an over voltage condition across the power bus.

23. The method of claim 18, further comprising:

stopping the supplying of charging current to the plurality of ultracapacitors in the event of attaining a desired threshold voltage across the plurality of ultracapacitors.

24. An apparatus to use in a power system, the apparatus comprising:

electrical power storing means for storing electrical power;

charging current limiting means for limiting a charging current supplied to the electrical power storing means below a charging current limit threshold; and

discharging means for discharging electrical power stored by the electrical power storing means that bypasses the charging current limiting means.

25. The apparatus of claim 24 wherein the electrical power storing means comprises:

a plurality of ultracapacitors, electrically coupled in series to one another.

26. The apparatus of claim 24 wherein the discharging means comprises:

a diode electrically coupled in parallel with the charging current limiting means to provide a bypass of the charging current limiting means for a discharge current.

27. The apparatus of claim 24 wherein the charging current limiting means comprises:

a charging current limiting transistor comprising a pair of active terminals and a control terminal, the active terminals electrically coupled in series with the electrical power storing means to pass a charging current to the electrical power storing means in response to a charging voltage exceeding a threshold voltage; and

a feedback transistor electrically coupled to control the charging current limiting transistor to limit the charging current to a threshold current.

28. The apparatus of claim 24 wherein the charging current limiting means comprises:

a charging current limiting transistor electrically coupled in series with the electrical power storing means and responsive to a charging voltage exceeding a threshold voltage;

a feedback transistor electrically coupled to control the charging current limiting transistor to limit the charging current to a threshold current;

a zener diode; and

a charging current limiting resistor, the zener diode and the charging current limiting resistor electrically coupled to the feedback transistor to set the threshold current.

29. The apparatus of claim 28 wherein the charging current limiting means further comprises:

loss limiting means for limiting power loss via the zener diode and the charging current limiting resistor.

30. The apparatus of claim 29 wherein the loss limiting means comprises:

a pair of Darlington coupled transistors, electrically coupled between the current limiting transistor and the feedback transistor.

31. The apparatus of claim 29 wherein the loss limiting means comprises:

an over voltage transistor electrically coupled to cut off the charging current in the event of an over voltage condition;

an over voltage resistor; and

an over voltage zener diode, the over voltage resistor and over voltage zener diode electrically coupled to the over voltage transistor to set an over voltage threshold corresponding to the over voltage condition.