Real time clock circuit having an internal clock generator
First Claim
1. A real time clock circuit comprising an internal clock generator for generating a clock signal, wherein the clock signal is divided by a divider into an initial set of values, and wherein the initial set of values is communicated to a set of clock registers.
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Abstract
Under the present invention a real time clock circuit, within a set-top box, is provided with an internal clock generator for generating multiple clock signals. Once generated, a first clock signal is divided into an initial set of values representing time and optionally day/date intervals, and then communicated to a set of clock registers. The initial set of values can then be communicated (directly or via a set of DCR registers) to a display component within the set-top box. Updated clock signals are received by the set of DCR registers from an external source such as a satellite or the like thus making the clock very accurate, and are communicated to the display component. Similar to the initial set of values, the updated set of values could be communicated to the display component directly from the set of DCR registers, or via the set of clock registers.
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Citations
23 Claims
- 1. A real time clock circuit comprising an internal clock generator for generating a clock signal, wherein the clock signal is divided by a divider into an initial set of values, and wherein the initial set of values is communicated to a set of clock registers.
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10. A set-top box, comprising:
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a real time clock circuit having an internal clock generator for generating a clock signal;
a divider for dividing the clock signal into an initial set of values;
a set of clock registers for receiving the initial set of values from the divider; and
a display component for receiving the initial set of values from the set of clock registers. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
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18. A method for communicating a clock signal to a display component within a set-top box, comprising:
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providing a real time clock circuit having an internal clock generator;
generating a clock signal with the internal clock generator;
dividing the clock signal into an initial set of values;
communicating the initial set of values to a set of clock registers; and
communicating the initial set of values from the set of clock registers to the display component. - View Dependent Claims (19, 20, 21, 22, 23)
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Specification