Comparator circuit, related method of comparing a vector to comparison boundaries and transmitter employing the same

• US 20040233599A1
• Filed: 05/21/2003
• Published: 11/25/2004
• Est. Priority Date: 05/21/2003
• Status: Active Grant

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Agere Systems Incorporated (Broadcom, Inc.)
• Inventors: Busking, Erik B.
• Granted Patent: US 7,345,531 B2
• Time in Patent Office: Days
• US Class Current: 361/85
• CPC Class Codes: H04L 25/061 providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset removal of dc offset in coupling arrangements H04L25/029, H04L25/0296
• CPC Class Codes: H04L 27/22 Demodulator circuits; Receiver circuits

Abstract

The present invention is directed to a comparator circuit for use with in-phase and quadrature phase signals and a method of comparing a resultant vector of the in-phase and quadrature phase signals. In one embodiment, the comparator circuit includes a non-titled comparison circuit that compares a resultant vector of the in-phase and quadrature phase signals to vertical and horizontal comparison boundary member pairs. The comparator circuit also includes a tilted comparison circuit, coupled to the non-tilted comparison circuit, that compares the resultant vector to comparison boundary member diagonals coupled to the vertical and horizontal comparison boundary member pairs. The comparator circuit may still further include a combiner circuit that provides a comparison signal based on signals from the non-tilted and tilted comparison circuits.

Claims

1. A comparator circuit for use with in-phase and quadrature phase signals, comprising:

a non-tilted comparison circuit configured to compare a resultant vector of said in-phase and quadrature phase signals to vertical and horizontal comparison boundary member pairs; and

a tilted comparison circuit, coupled to said non-tilted comparison circuit, configured to compare said resultant vector to comparison boundary member diagonals coupled to said vertical and horizontal comparison boundary member pairs.

2. The comparator circuit as recited in claim 1 further comprising a combiner circuit configured to provide a comparison signal based on signals from said non-tilted and tilted comparison circuits.

3. The comparator circuit as recited in claim 1 wherein said vertical and horizontal comparison boundary member pairs and said boundary member diagonals are substantially equal in length.

4. The comparator circuit as recited in claim 1 wherein said vertical and horizontal comparison boundary member pairs and said comparison boundary member diagonals form an octagonal comparison boundary.

5. The comparator circuit as recited in claim 1 wherein said non-tilted comparison circuit comprises a window comparator.

6. The comparator circuit as recited in claim 1 wherein said tilted comparison circuit comprises an absolute value circuit.

7. The comparator circuit as recited in claim 1 wherein said resultant vector is based on error signal components of said in-phase and quadrature phase signals.

8. A method of comparing a resultant vector of in-phase and quadrature phase signals, comprising:

comparing said resultant vector to vertical and horizontal comparison boundary member pairs; and

further comparing said resultant vector to comparison boundary member diagonals coupled to said vertical and horizontal comparison boundary member pairs.

9. The method as recited in claim 8 further comprising providing a comparison signal based on signals generated from said comparing and further comparing said resultant vector.

10. The method as recited in claim 8 wherein said vertical and horizontal comparison boundary member pairs and said boundary member diagonals are substantially equal in length.

11. The method as recited in claim 8 wherein said vertical and horizontal comparison boundary member pairs and said comparison boundary member diagonals form an octagonal comparison boundary.

12. The method as recited in claim 8 wherein said comparing is performed by a non-tilted comparison circuit comprising a window comparator.

13. The method as recited in claim 8 wherein said further comparing is performed by a tilted comparison circuit comprising an absolute value circuit.

14. The method as recited in claim 8 wherein said resultant vector is based on error signal components of said in-phase and quadrature phase signals.

15. A transmitter, comprising:

an input section and a feedback section employing in-phase and quadrature phase signals;

a power amplifier coupled to said input and feedback sections;

an error detection circuit, coupled to said input and feedback sections, that derives error signal components from said in-phase and quadrature phase signals;

a comparator circuit, including;

a non-tilted comparison circuit that compares a resultant vector based on said error signal components to vertical and horizontal comparison boundary member pairs of an octagonal comparison boundary, and

a tilted comparison circuit, coupled to said non-tilted comparison circuit, that compares said resultant vector to comparison boundary member diagonals of said octagonal comparison boundary; and

a control circuit, coupled to said comparator circuit, that controls a power level of said power amplifier based on a comparison signal associated with said non-tilted and tilted comparison circuits.

16. The transmitter as recited in claim 15 wherein said comparator circuit further comprises a combiner circuit that provides said comparison signal based on signals from said non-tilted and tilted comparison circuits.

17. The transmitter as recited in claim 15 wherein said vertical and horizontal comparison boundary member pairs and said boundary member diagonals are substantially equal in length.

18. The transmitter as recited in claim 15 wherein said octagonal comparison boundary approximates a circle whose radius is based on a reference parameter.

19. The transmitter as recited in claim 15 wherein said non-tilted comparison circuit comprises a window comparator.

20. The transmitter as recited in claim 15 wherein said tilted comparison circuit comprises an absolute value circuit.